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DS26521 Datasheet(PDF) 86 Page - Maxim Integrated Products |
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DS26521 Datasheet(HTML) 86 Page - Maxim Integrated Products |
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86 / 258 page  DS26521 Single T1/E1/J1 Transceiver 86 of 258 FRAMER REGISTER LIST ADDRESS NAME DESCRIPTION R/W 0C1h RBCS2 Receive Blank Channel Select Register 2 R/W 0C2h RBCS3 Receive Blank Channel Select Register 3 R/W 0C3h RBCS4 Receive Blank Channel Select Register 4 (E1 Mode Only) R/W 0C4h RCBR1 Receive Channel Blocking Register 1 R/W 0C5h RCBR2 Receive Channel Blocking Register 2 R/W 0C6h RCBR3 Receive Channel Blocking Register 3 R/W 0C7h RCBR4 Receive Channel Blocking Register 4 (E1 Mode Only) R/W 0C8h RSI1 Receive-Signaling Reinsertion Enable Register 1 R/W 0C9h RSI2 Receive-Signaling Reinsertion Enable Register 2 R/W 0CAh RSI3 Receive-Signaling Reinsertion Enable Register 3 R/W 0CBh RSI4 Receive-Signaling Reinsertion Enable Register 4 (E1 Mode Only) R/W 0CCh RGCCS1 Receive Gapped Clock Channel Select Register 1 R/W 0CDh RGCCS2 Receive Gapped Clock Channel Select Register 2 R/W 0CEh RGCCS3 Receive Gapped Clock Channel Select Register 3 R/W 0CFh RGCCS4 Receive Gapped Clock Channel Select Register (E1 Mode Only) R/W 0D0h RCICE1 Receive Channel Idle Code Enable Register 1 R/W 0D1h RCICE2 Receive Channel Idle Code Enable Register 2 R/W 0D2h RCICE3 Receive Channel Idle Code Enable Register 3 R/W 0D3h RCICE4 Receive Channel Idle Code Enable Register 4 (E1 Mode Only) R/W 0D4h RBPCS1 Receive BERT Port Channel Select Register 1 R/W 0D5h RBPCS2 Receive BERT Port Channel Select Register 2 R/W 0D6h RBPCS3 Receive BERT Port Channel Select Register 3 R/W 0D7h RBPCS4 Receive BERT Port Channel Select Register (E1 Mode Only) R/W 0D8h–0EFh — Reserved — 0F0h–0FFh Global Registers (Section 9.3) See the Global Register list in Table 9-2. Note that this space is “Reserved” in Framers 2 to 8. R/W 100h–10Fh — Reserved — 110h THC1 Transmit HDLC Control Register 1 R/W 111h THBSE Transmit HDLC Bit Suppress Register R/W 112h — Reserved — 113h THC2 Transmit HDLC Control Register 2 R/W 114h E1TSACR E1 Transmit Sa-Bit Control Register (E1 Mode) R/W 115h–117h — Reserved — 118h SSIE1 Software-Signaling Insertion Enable Register 1 R/W 119h SSIE2 Software-Signaling Insertion Enable Register 2 R/W 11Ah SSIE3 Software-Signaling Insertion Enable Register 3 R/W 11Bh SSIE4 Software-Signaling Insertion Enable Register 4 (E1 Mode Only) R/W 11Ch–11Fh — Reserved — 120h TIDR1 Transmit Idle Code Definition Register 1 R/W 121h TIDR2 Transmit Idle Code Definition Register 2 R/W 122h TIDR3 Transmit Idle Code Definition Register 3 R/W 123h TIDR4 Transmit Idle Code Definition Register 4 R/W 124h TIDR5 Transmit Idle Code Definition Register 5 R/W 125h TIDR6 Transmit Idle Code Definition Register 6 R/W 126h TIDR7 Transmit Idle Code Definition Register 7 R/W 127h TIDR8 Transmit Idle Code Definition Register 8 R/W 128h TIDR9 Transmit Idle Code Definition Register 9 R/W 129h TIDR10 Transmit Idle Code Definition Register 10 R/W 12Ah TIDR11 Transmit Idle Code Definition Register 11 R/W 12Bh TIDR12 Transmit Idle Code Definition Register 12 R/W 12Ch TIDR13 Transmit Idle Code Definition Register 13 R/W |
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