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DS26521 Datasheet(PDF) 57 Page - Maxim Integrated Products

Part # DS26521
Description  Single T1/E1/J1 Transceiver
PDF  258 Pages
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Manufacturer  MAXIM [Maxim Integrated Products]
Direct Link  https://www.maximintegrated.com/en.html
Logo MAXIM - Maxim Integrated Products

DS26521 Datasheet(HTML) 57 Page - Maxim Integrated Products

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DS26521 Single T1/E1/J1 Transceiver
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8.9.9.4 E-Bit Counter (EBCR)
This counter is only available in E1 mode. E-Bit Count Register 1 (E1EBCR1) is the most significant word and E-Bit
Count Register 2 (E1EBCR2) is the least significant word of a 16-bit counter that records far-end block errors
(FEBE) as reported in the first bit of frames 13 and 15 on E1 lines running with CRC-4 multiframe. These count
registers increment once each time the received E-bit is set to 0. Since the maximum E-bit count in a one-second
period is 1000, this counter cannot saturate. The counter is disabled during loss of sync at either the FAS or CRC-4
level; it continues to count if loss of multiframe sync occurs at the CAS level.
8.9.10 DS0 Monitoring Function
The DS26521 can monitor one DS0 (64kbps) channel in the transmit direction and one DS0 channel in the receive
direction at the same time. Table 8-24 shows the registers related to the control of transmit and receive DS0.
Table 8-24. Registers Related to DS0 Monitoring
REGISTER
FRAMER
ADDRESSES
FUNCTION
Transmit DS0 Channel Monitor Select
(TDS0SEL)
189h
Transmit channel to be monitored.
Transmit DS0 Monitor Register
(TDS0M)
1BBh
Monitored data.
Receive Channel Monitor Select Register
(RDS0SEL)
012h
Receive channel to be monitored.
Receive DS0 Monitor Register
(RDS0M)
060h
Monitored data.
In the transmit direction, the user determines which channel is to be monitored by properly setting the TCM[4:0] bits
in the TDS0SEL register. In the receive direction, the RCM[4:0] bits in the RDS0SEL register need to be properly
set. The DS0 channel pointed to by the TCM[4:0] bits appear in the Transmit DS0 Monitor register (TDS0M) and
the DS0 channel pointed to by the RCM[4:0] bits appear in the Receive DS0 Monitor register (RDS0M). The
TCM[4:0] and RCM[4:0] bits should be programmed with the decimal decode of the appropriate T1 or E1 channel.
T1 channels 1 to 24 map to register values 0 to 23. E1 channels 1 to 32 map to register values 0 to 31. For
example, if DS0 channel 6 in the transmit direction and DS0 channel 15 in the receive direction needed to be
monitored, then the following values would be programmed into TDS0SEL and RDS0SEL:
TCM4 = 0
RCM4 = 0
TCM3 = 0
RCM3 = 1
TCM2 = 1
RCM2 = 1
TCM1 = 0
RCM1 = 1
TCM0 = 1
RCM0 = 0



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