DS26521 datasheet(19/258 Pages) MAXIM

19 / 258 page

DS26521 Single T1/E1/J1 Transceiver

19 of 258

PIN DESCRIPTIONS

7.1

Pin Functional Description

Table 7-1. Detailed Pin Descriptions

NAME

TYPE

FUNCTION

ANALOG TRANSMIT

TTIP

Analog

Output,

High

Impedance

Transmit Bipolar Tip.

This pin is a differential line driver tip output. This pin can

be high impedance if:

If TXENABLE is low, the TTIP/TRING will be high impedance. Note that if

TXENABLE is low, the register settings for control of the TTIP/TRING are ignored

and output is high impedance.

The differential outputs of TTIP and TRING can provide internal matched

impedance for E1 75

Ω , E1 120Ω, T1 100Ω, or J1 110Ω. The user has the option

of turning off internal termination.

TRING

Analog

Output,

High

Impedance

Transmit Bipolar Ring.

This pin is a differential line driver ring output. This pin

can be high impedance if:

If TXENABLE is low, the TTIP/TRING will be high impedance. Note that if

TXENABLE is low, the register settings for control of the TTIP/TRING are ignored

and output is high impedance.

The differential outputs of TTIPn and TRINGn can provide internal matched

impedance for E1 75

Ω, E1 120Ω, T1 100Ω, or J1 110Ω. The user has the option of

turning off internal termination.

TXENABLE

Transmit Enable.

If this pin is pulled low, all transmitter outputs (TTIP and TRING)

are high impedance. The register settings for tri-state control of TTIP/TRING are

ignored if TXENABLE is low. If TXENABLE is high, the particular driver can be tri-

stated by the register settings.

ANALOG RECEIVE

RTIP

Analog

Input

Receive Bipolar Tip.

The differential inputs of RTIP and RRING can provide

internal matched impedance for E1 75

Ω, E1 120Ω, T1 100Ω, or J1 110Ω. The user

has the option of turning off internal termination via the LIU Receive Impedance

and Sensitivity Monitor register (LRISMR).

RRING

Analog

Input

Receive Bipolar Ring.

The differential inputs of RTIP and RRING can provide

internal matched impedance for E1 75

Ω, E1 120Ω, T1 100Ω, or J1 110Ω. The user

has the option of turning off internal termination via the LIU Receive Impedance

and Sensitivity Monitor register (LRISMR).

TRANSMIT FRAMER

TSER

Transmit NRZ Serial Data.

This pin is sampled on the falling edge of TCLK when

the transmit-side elastic store is disabled. This pin is sampled on the falling edge of

TSYSCLK when the transmit-side elastic store is enabled.

In IBO mode, data for multiple framers can be used in high-speed multiplexed

scheme. This is described in Section 8.8.2. The table there presents the

combination of framer data for each of the streams.

TSYSCLK is used as a reference when IBO is invoked.

TCLK

Transmit Clock.

A 1.544MHz or a 2.048MHz primary clock. Used to clock data

through the transmit side of the transceiver. TSER data is sampled on the falling

edge of TCLK. TCLK is used to sample TSER when the elastic store is not enabled

or IBO is not used.

TSYSCLK

Transmit System Clock.

1.544MHz, 2.048MHz, 4.096MHz, 8.192MHz, or

16.384MHz clock. Only used when the transmit-side elastic store function is

enabled. Should be tied low in applications that do not use the transmit-side elastic

store. The clock can be 4.096MHz, 8.912MHz, or 16.384MHz when IBO mode is

used.

DS26521 Datasheet(PDF) 19 Page - Maxim Integrated Products

DS26521 Datasheet(HTML) 19 Page - Maxim Integrated Products

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL