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DS26521 Datasheet(PDF) 26 Page - Maxim Integrated Products |
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DS26521 Datasheet(HTML) 26 Page - Maxim Integrated Products |
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26 / 258 page  DS26521 Single T1/E1/J1 Transceiver 26 of 258 user must configure the SPI_CPOL and SPI_CPHA pins to describe which type of clock that the master device is providing. Figure 8-1. SPI Serial Port Access for Read Mode (SPI_CPOL = 0, SPI_CPHA = 0) 1 A7 A13 A12 A11 A10 A9 A8 D7 D6 D5 D4 D3 D2 D1 D0 LSB MSB LSB MSB SPI_SCLK CSB SPI_MOSI SPI_MISO B A6 A5 A4 A3 A2 A1 LSB MSB A0 Figure 8-2. SPI Serial Port Access for Read Mode (SPI_CPOL = 1, SPI_CPHA = 0) SPI_SCLK 1 A7 A13 A12 A11 A10 A9 A8 D7 D6 D5 D4 D3 D2 D1 D0 LSB MSB LSB MSB SPI_MOSI SPI_MISO B A6 A5 A4 A3 A2 A1 LSB MSB A0 CSB Figure 8-3. SPI Serial Port Access for Read Mode (SPI_CPOL = 0, SPI_CPHA = 1) SPI_SLCK CSB 1 A7 A13 A12 A11 A10 A9 A8 D7 D6 D5 D4 D3 D2 D1 D0 LSB MSB LSB MSB SPI_MOSI SPI_MISO B A6 A5 A4 A3 A2 A1 LSB MSB A0 Figure 8-4. SPI Serial Port Access for Read Mode (SPI_CPOL = 1, SPI_CPHA = 1) SPI_SLCK CSB 1 A7 A13 A12 A11 A10 A9 A8 D7 D6 D5 D4 D3 D2 D1 D0 LSB MSB LSB MSB SPI_MOSI SPI_MISO B A6 A5 A4 A3 A2 A1 LSB MSB A0 |
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