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DS26521 Datasheet(PDF) 52 Page - Maxim Integrated Products |
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DS26521 Datasheet(HTML) 52 Page - Maxim Integrated Products |
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52 / 258 page ![]() DS26521 Single T1/E1/J1 Transceiver 52 of 258 Table 8-18 shows some of the registers related to maintenance and alarms. Table 8-18. Registers Related to Maintenance and Alarms REGISTER FRAMER ADDRESSES FUNCTION Receive Real-Time Status Register 1 (RRTS1) 0B0h Real-time receive status 1. Receive Interrupt Mask Register 1(RIM1) 0A0h Real-time interrupt mask 1. Receive Latched Status Register 2 (RLS2) 091h Real-time latched status 2. Receive Real-Time Status Register 3 (RRTS3) 0B2h Real-time receive status 3. Receive Latched Status Register 3 (RLS3) 092h Real-time latched status 3. Receive Interrupt Mask Register 3 (RIM3) 0A2h Real-time interrupt mask 3. Receive Interrupt Mask Register 4 (RIM4) 0A3h Real-time interrupt mask 4. Receive Latched Status Register 7 (RLS7) 096h Real-time latched status 7. Receive Interrupt Mask Register 7 (RIM7) 0A6h Real-time interrupt mask 7. Transmit Latched Status Register 1 (TLS1) 190h Loss of transmit clock status, TPDV, etc. Transmit Latched Status Register 3 (Synchronizer) (TLS3) 192h Loss of frame status. Receive DS0 Monitor Register (RDS0M) 060h Receive DS0 monitor. Error-Counter Configuration Register (ERCNT) 086h Configuration of the error counters. Line Code Violation Count Register 1 (LCVCR1) 050h Line code violation counter 1. Line Code Violation Count Register 2 (LCVCR2) 051h Line code violation counter 2. Path Code Violation Count Register 1 (PCVCR1) 052h Receive path code violation counter 1. Path Code Violation Count Register 2 (PCVCR2) 053h Receive path code violation counter 2. Frames Out of Sync Count Register 1 (FOSCR1) 054h Receive frame out of sync counter 1 Frames Out of Sync Count Register 2 (FOSCR2) 055h Receive frame out of sync counter 2 E-Bit Count Register 1 (E1EBCR1) 056h E-bit count register 1. E-Bit Count Register 2 (E1EBCR2) 057h E-bit count register 2. |
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