33903 datasheet(47/104 Pages) FREESCALE

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Analog Integrated Circuit Device Data

Freescale Semiconductor

33903/4/5

FUNCTIONAL DEVICE OPERATION

CYCLIC INT OPERATION DURING LP VDD ON MODE

Principle

This function can be used only in LP VDD ON Mode (LP

VDD ON).

When Cyclic INT is selected and device is in LP VDD ON

Mode, the device will generate a periodic INT pulse.

Upon reception of the INT pulse, the MCU must

acknowledge the INT by sending SPI commands before the

end of the next INT period in order to keep the process going.

When Cyclic INT is selected and operating, the device

remains in LP VDD ON Mode, assuming the SPI commands

are issued properly. When no/improper SPI commands are

sent, the device will cease Cyclic INT operation and leave LP

VDD ON Mode by issuing a reset. The device will then enter

into Normal Request Mode.

VDD current capability and VDD regulator behavior is

similar as in LP VDD ON Mode.

Operation

Cyclic INT period selection: register timer B

SPI command in hex 0x56xx [example; 0x560E for 512ms

cyclic Interrupt period (SPI command without parity bit)].

This command must be send while the device is in Normal

Mode.

SPI commands to acknowledge INT: (2 commands)

- read the Random code via the watchdog register address

using the following command: MOSI 0x1B00 device report on

MISO second byte the RNDM code (MISO bit 0-7).

- write watchdog refresh command using the random code

inverted: 0x5A RNDb.

These commands can occur at any time within the period.

Initial entry in LP Mode with Cyclic INT: after the device is

set in LP VDD ON Mode, with cyclic INT enable, no SPI

command is necessary until the first INT pulse occurs. The

acknowledge process must start only after the 1st INT pulse.

Leave LP Mode with Cyclic INT:

This is done by a SPI Wake-Up command, similar to SPI

Wake-Up from LP VDD ON Mode: 0x5C10. The device will

enter into Normal Request Mode.

Improper SPI command while Cyclic INT operates:

When no/improper SPI commands are sent, while the

device is in LP VDD ON Mode with Cyclic INT enable, the

device will cease Cyclic INT operation and leave LP VDD ON

Mode by issuing a reset. The device will then enter into

Normal Request Mode.

The figure below (Figure 29) describes the complete

Cyclic Interrupt operation.

NORMAL MODE

INT

SPI

Timer B

LP VDD

Cyclic INT period

LP VDD ON MODE

ON Mode

Read RNDM code

Write RNDM code inv.

1st period

2nd period

NORMAL

MODE

Cyclic INT period

3rd period

SPI Wake-Up: 0x5C10

Write Timer B, select Cyclic INT period (ex: 512 ms, 0x560E)

Write Device Mode: LP VDD ON with Cyclic INT enable (example: 0x5C90)

Cyclic INT period

Legend for SPI commands

INT

SPI

RST

RESET and

REQUEST

Prepare LP VDD ON

In LP VDD ON with Cyclic INT

Leave LP

Improper or no

with Cyclic INT

VDD ON Mode

LP VDD ON MODE

Leave LP VDD ON and Cyclic INT due to improper operation

REQUEST

acknowledge SPI command

NORMAL

MODE

Figure 29. Cyclic Interrupt Operation

33903 Datasheet(PDF) 47 Page - Freescale Semiconductor, Inc

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