Electronic Components Datasheet Search
  English  ▼

X  

Preview PDF HTML

33903 Datasheet(PDF) 73 Page - Freescale Semiconductor, Inc

Part # 33903
Description  SBC Gen2 with CAN High Speed and LIN Interface
PDF  104 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  FREESCALE [Freescale Semiconductor, Inc]
Direct Link  http://www.freescale.com
Logo FREESCALE - Freescale Semiconductor, Inc

33903 Datasheet(HTML) 73 Page - Freescale Semiconductor, Inc

Back Button 33903 Datasheet HTML 69Page - Freescale Semiconductor, Inc 33903 Datasheet HTML 70Page - Freescale Semiconductor, Inc 33903 Datasheet HTML 71Page - Freescale Semiconductor, Inc 33903 Datasheet HTML 72Page - Freescale Semiconductor, Inc 33903 Datasheet HTML 73Page - Freescale Semiconductor, Inc 33903 Datasheet HTML 74Page - Freescale Semiconductor, Inc 33903 Datasheet HTML 75Page - Freescale Semiconductor, Inc 33903 Datasheet HTML 76Page - Freescale Semiconductor, Inc 33903 Datasheet HTML 77Page - Freescale Semiconductor, Inc Next Button
Zoom Inzoom in Zoom Outzoom out
 73 / 104 page
background image
Analog Integrated Circuit Device Data
Freescale Semiconductor
73
33903/4/5
SERIAL PERIPHERAL INTERFACE
DETAIL OF CONTROL BITS AND REGISTER MAPPING
TIMER REGISTERS
Table 20. Timer Register A, LP VDD Over-current & Watchdog Period Normal Mode, TIM_A
MOSI First Byte [15-8]
[b_15 b_14] 01_010 [P/N]
MOSI Second Byte, bits 7-0
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
01 01_ 010 P
I_mcu[2]
I_mcu[1]
I_mcu[1]
watchdog
Nor[4]
W/D_N[4]
W/D_Nor[3]
W/D_N[2]
W/D_Nor[0]
Default state
0
0
0
1
1
1
1
0
Condition for default
POR
LP VDD Over-current (ms)
b7
b6, b5
00
01
10
11
0
3 (def)
6
12
24
1
4
8
16
32
Watchdog Period in Device Normal Mode (ms)
b4, b3
b2, b1, b0
000
001
010
011
100
101
110
111
00
2.5
5
10
20
40
80
160
320
01
3
6
12
24
48
96
192
384
10
3.5
7
14
28
56
112
224
448
11
4
8
16
32
64
128
256 (def)
512
Table 21. Timer Register B, Cyclic Sense and Cyclic INT, in Device LP Mode, TIM_B
MOSI First Byte [15-8]
[b_15 b_14] 01_011 [P/N]
MOSI Second Byte, bits 7-0
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
01 01_ 011 P
Cyc-sen[3]
Cyc-sen[2]
Cyc-sen[1]
Cyc-sen[0]
Cyc-int[3]
Cyc-int[2]
Cyc-int[1]
Cyc-int[0]
Default state
0
0
0
0
0
0
0
0
Condition for default
POR
Cyclic Sense (ms)
b7
b6, b5, b4
000
001
010
011
100
101
110
111
0
3
6
12
24
48
96
192
384
1
4
8
16
32
64
128
256
512
Cyclic Interrupt (ms)
b3
b2, b1, b0
000
001
010
011
100
101
110
111
0
6 (def)
12
24
48
96
192
384
768
1
8
16
32
64
128
258
512
1024



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100  ...More


Datasheet Download

Go To PDF Page


Link URL



Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link to Datasheet    |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com