33903 datasheet(82/104 Pages) FREESCALE

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Table 36. LIN2 Register(41)

MOSI First byte [15-8]

[b_15 b_14] 10_010 [P/N]

MOSI Second Byte, bits 7-0

bit 7

bit 6

bit 5

bit 4

bit 3

bit 2

bit 1

bit 0

01 10_ 100P

LIN mode[1]

LIN mode[0]

Slew rate[1]

Slew rate[0]

LIN T2 on

Vsup ext

Default state

Condition for default

POR

Bits

Description

b7 b6

LIN mode [1], LIN mode [0] - LIN 2 interface mode control, Wake-Up enable / disable

LIN2 disable, Wake-Up capability disable

not used

LIN2 disable, Wake-Up capability enable

LIN2 Transmit Receive Mode(40)

b5 b4

Slew rate[1], Slew rate[0] LIN 2slew rate selection

Slew rate for 20 kbit/s baud rate

Slew rate for 10 kbit/s baud rate

Slew rate for fast baud rate

LIN T2 on

LIN 2 termination OFF

LIN 2 termination ON

VSUP ext

LIN goes recessive when device VSUP/2 is below typically 6.0 V. This is to meet J2602 specification

LIN continues operation below VSUP/2 6.0 V, until 5 V-CAN is disabled.

Notes

40.

The LIN interface can be set in TXD/RXD Mode only when the TXD-L input signal is in a recessive state. An attempt to set TXD/RXD

Mode while TXD-L is low, will be ignored and the LIN interface will remain disabled.

41.

In order to use the LIN interface, the 5V-CAN regulator must be set to ON.

Analog Integrated Circuit Device Data

Freescale Semiconductor

33903/4/5

SERIAL PERIPHERAL INTERFACE

DETAIL OF CONTROL BITS AND REGISTER MAPPING

33903 Datasheet(PDF) 82 Page - Freescale Semiconductor, Inc

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