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ADV7180WBSTZ Datasheet(PDF) 112 Page - Analog Devices

Part # ADV7180WBSTZ
Description  10-Bit, 4횞 Oversampling SDTV Video Decoder
PDF  120 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

ADV7180WBSTZ Datasheet(HTML) 112 Page - Analog Devices

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ADV7180
Data Sheet
Rev. G | Page 112 of 120
0.1µF
SCLK
54
SCLK
SDATA
53
SDA
AIN1
35
AIN1
AIN2
36
AIN2
AIN3
46
AIN3
AIN4
47
AIN4
AIN5
48
AIN5
AIN6
49
AIN6
LLC
20
LLC
33Ω
33Ω
ELPF
30
82nF
10nF
PVDD_1.8V
1.69kΩ
KEEP CLOSE TO THE ADV7180 AND ON
THE SAME SIDE OF PCB AS THE ADV7180.
EXTERNAL
LOOP FILTER
P0
26
P0
P1
25
P1
P2
19
P2
P3
18
P3
P4
17
P4
P5
16
P5
P6
15
P6
P7
14
P7
P[0:7]
P8
8P8
P9
7P9
P10
6P10
P11
5P11
P12
62
P12
P13
61
P13
P14
60
P14
P15
59
P15
P[8:15]
VREFN
39
VREFP
38
1MΩ
28.63636MHz
47pF
47pF
XTAL
22
XTAL1
21
ALSB
52
DVDDIO_3.3V
4kΩ
PVDD_1.8V
0.1µF
10nF
DVDD_1.8V
DVDD_1.8V
0.1µF
10nF
AVDD_1.8V
0.1µF
10nF
DVDDIO_3.3V
10nF
0.1µF
10nF
0.1µF
DVDDIO_3.3V
10nF
0.1µF
39Ω
36Ω
0.1µF
ANALOG_INPUT_4
Cr
AIN4
39Ω
36Ω
0.1µF
ANALOG_INPUT_3
YC_Y
AIN3
39Ω
36Ω
0.1µF
ANALOG_INPUT_2
CVBS
AIN2
39Ω
36Ω
0.1µF
ANALOG_INPUT_1
Y
AIN1
39Ω
36Ω
0.1µF
ANALOG_INPUT_5
Cb
AIN5
39Ω
36Ω
0.1µF
ANALOG_INPUT_6
YC_C
AIN6
RESET
51
RESET
INTRQ
1
INT
GPO3
55
GPO3
GPO2
56
GPO2
GPO1
12
GPO1
GPO0
13
GPO0
VS
64
VSYNC
FIELD
63
FIELD
HS
2
HS
SFL
9
NC
27, 28, 33,
41, 42, 44,
45, 50
SFL
PWRDWN
29
POWER_DOWN
NC = NO CONNECT
ADV7180BSTZ
LQFP–64
THE SUGGESTED INPUT ARRANGEMENT
IS AS SEEN ON THE EVAL BOARD AND IS
DIRECTLY SUPPORTED BY INSEL.
TIE HI: I2C ADDRESS = 42
TIE LOW: I2C ADDRESS = 40
DATA BUS
P[0:7]
P[8:15]
8-BIT
OUTPUT MODE
N/A
656/601 YCbCr
16-BIT
OUTPUT MODE
CbCr
Y
KEEP VREFN AND VREFP CAPACITOR AS CLOSE AS
POSSIBLE TO THE ADV7180 AND ON THE SAME
SIDE OF THE PCB AS THE ADV7180.
Figure 56. 64-Lead LQFP Typical Connection Diagram



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