ADV7180WBSTZ datasheet(110/120 Pages) AD

110 / 120 page

ADV7180

Data Sheet

Rev. G | Page 110 of 120

PCB LAYOUT RECOMMENDATIONS

The ADV7180 is a high precision, high speed, mixed-signal

device. To achieve the maximum performance from the part, it

is important to have a well laid out PCB. The following is a

guide for designing a board using the ADV7180.

ANALOG INTERFACE INPUTS

Care should be taken when routing the inputs on the PCB.

Track lengths should be kept to a minimum, and 75 Ω trace

impedances should be used when possible. In addition, trace

impedances other than 75 Ω increase the chance of reflections.

POWER SUPPLY DECOUPLING

It is recommended to decouple each power supply pin with

0.1 μF and 10 nF capacitors. The fundamental idea is to have a

decoupling capacitor within about 0.5 cm of each power pin. In

addition, avoid placing the capacitor on the opposite side of the

PCB from the ADV7180 because doing so interposes inductive

vias in the path. The decoupling capacitors should be located

between the power plane and the power pin. Current should

flow from the power plane to the capacitor and then to the

power pin. Do not apply the power connection between the

capacitor and the power pin. Placing a via underneath the

100 nF capacitor pads, down to the power plane, is the best

approach (see Figure 54).

SUPPLY

GROUND

10nF

100nF

VIA TO SUPPLY

VIA TO GND

Figure 54. Recommended Power Supply Decoupling

It is particularly important to maintain low noise and good

stability of PVDD. Careful attention must be paid to regulation,

filtering, and decoupling. It is highly desirable to provide separate

regulated supplies for each of the analog circuitry groups (AVDD,

DVDD, DVDDIO, and PVDD).

Some graphic controllers use substantially different levels of

power when active (during active picture time) and when idle

(during horizontal and vertical sync periods). This can result in

a measurable change in the voltage supplied to the analog supply

regulator, which can in turn produce changes in the regulated

analog supply voltage. This can be mitigated by regulating the

analog supply, or at least PVDD, from a different, cleaner power

source, for example, from a 12 V supply.

Using a single ground plane for the entire board is also recom-

mended.

Experience has repeatedly shown that the noise performance is

the same or better with a single ground plane. Using multiple

ground planes can be detrimental because each separate ground

plane is smaller, and long ground loops can result.

PLL

Place the PLL loop filter components as close as possible to the

ELPF pin. It should also be placed on the same side of the PCB

as the ADV7180. Do not place any digital or other high frequency

traces near these components. Use the values suggested in this

data sheet with tolerances of 10% or less.

VREFN AND VREFP

The circuit associated with these pins should be placed as close

as possible and on the same side of the PCB as the ADV7180.

DIGITAL OUTPUTS (BOTH DATA AND CLOCKS)

Try to minimize the trace length that the digital outputs have to

drive. Longer traces have higher capacitance, requiring more

current and, in turn, causing more internal digital noise.

Shorter traces reduce the possibility of reflections.

Adding a 30 Ω to 50 Ω series resistor can suppress reflections,

reduce EMI, and reduce the current spikes inside the ADV7180.

If series resistors are used, place them as close as possible to the

ADV7180 pins. However, try not to add vias or extra length to

the output trace to place the resistors closer.

If possible, limit the capacitance that each of the digital outputs

drives to less than 15 pF. This can easily be accomplished by

keeping traces short and by connecting the outputs to only one

device. Loading the outputs with excessive capacitance increases

the current transients inside the ADV7180, creating more digital

noise on its power supplies.

The 40-lead and 32-lead LFCSP have an exposed metal paddle

on the bottom of the package. This paddle must be soldered to

PCB ground for proper heat dissipation and for noise and

mechanical strength benefits.

DIGITAL INPUTS

The digital inputs on the ADV7180 are designed to work with

1.8 V to 3.3 V signals and are not tolerant of 5 V signals. Extra

components are needed if 5 V logic signals are required to be

applied to the decoder.

ADV7180WBSTZ Datasheet(PDF) 110 Page - Analog Devices

ADV7180WBSTZ Datasheet(HTML) 110 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL