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XRT72L13 Datasheet(PDF) 116 Page - Exar Corporation |
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XRT72L13 Datasheet(HTML) 116 Page - Exar Corporation |
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116 / 370 page ![]() XRT72L13 MULTIPLEXER/FRAMER IC áç áç áç áç PRELIMINARY REV. 1.0.6 104 Setting this bit-field to “1” configures the M12 MUX to set the “X-bits” (within the “outbound” DS2 data stream) to “0”. This signaling will be interpreted (by the remote terminal equipment) as a FERF indicator. Settiing this bit-field to “0” configures the M12 MUX to set the “X-bits” (within the “outbound” DS2 data stream) to “1”. This signaling will be interpreted (by the remote terminal equipment) as an indication of no FERF. Bits 1 and 0 M12 LB Code[1:0] 2.3.2.30 M12 DS2 # 7 Configuration Register ) Bit 7 - Reserved This bit-field must be set to “0”, in order for the XRT72L13 M13 device to function properly. Bit 6 - Reserved This bit-field must be set to “0” in order for the XRT72L13 M13 device to function properly. Bit 5 - M12 Bypass This “Read/Write” bit field permits the user to bypass M12 Multiplexer/De-Multiplexer # 6. By doing this the following will happen. In the Transmit Direction • The XRT72L13 M13 device will accept a DS2 clock signal (6.312MHz) via the TxDS1Clk23 input pin. • The XRT72L13 M13 device will accept a DS2 sig- nal via the TxDS1Data_23 input pin In the Receive Direction • The XRT72L13 M13 device will output a DS2 clock signal (6.312MHz) via the RxDS1Clk23 output pin. • XRT72L13 M13 device will output the contents of DS2 Channel # 6 via the RxDS1Data23 output pin. Setting this bit-field to “1” configures M12 MUX # 6 and M12 DEMUX # 6 to be bypassed. Setting this bit-field to “0” enables M12 MUX # 6 and M12 DEMUX # 6. Bit 4 - M12 G.747 This “Read/Write” bit-field permits the user to config- ure M12 MUX # 6 and DEMUX # 6 to support either a DS2 signal or an ITU-T G.747 signal. Setting this bit-field to “0” configures M12 # 6 to sup- port DS2. In this mode, the M12 MUX will accept four DS1 signals (via TxDS1Data20 thru TXDS1Data23) and will muitiplex these signals into a DS2 signal. Likewise, the M12 DEMUX will accept an incoming DS2 signal (from the M23 DEMUX) and will de-multi- plex this signal into 4 DS1 signals. These four DS1 signals will be output via the “RxDS1Data20” thru “RxDS1Data23” output pins. Setting this bit-field to “1” configures M12 # 6 to sup- port ITU-T G.747. In this mode, the M12 MUX will ac- cept 3 E1 signals (via TxDS1Data20 thru TxDS1Data22) and will multiplex these signals into an ITU-T G.747 signal. Likewise, the M12 DEMUX will accept an incoming ITU-T G.747 signal (from the M23 DEMUX) and will de-multiplexe this signal into 3 E1 signals. These three E1 signals will output via the “RxDS1Data20” thru “RxDS1Data22” output pins. Bit 3 - M12G.747 Reserved Bit 2 - M12 FERF This “Read/Write” bit-field permits the user to force M12 MUX # 6 to transmit a “FERF” (Far-End-Receive Failure) indicator to the M23 MUX (and in turn to the remote terminal equipment). Setting this bit-field to “1” configures the M12 MUX to set the “X-bits” (within the “outbound” DS2 data stream) to “0”. This signaling will be interpreted (by the remote terminal equipment) as a FERF indicator. Settiing this bit-field to “0” configures the M12 MUX to set the “X-bits” (within the “outbound” DS2 data stream) to “1”. This signaling will be interpreted (by the remote terminal equipment) as an indication of no FERF. Bits 1 and 0 M12 LB Code[1:0] M12 DS2 # 7 CONFIGURATION REGISTER (ADDRESS = 0X20) BIT 7BIT 6BIT 5BIT 4BIT 3BIT 2BIT 1BIT 0 Reserved 7 Reserved 6 M12 Bypass M12 G.747 M12 G.747 Res M12 FERF M12LBCode[1:0] R/W R/W R/W R/W R/W R/W R/W R/W 00 000 111 |
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