XRT72L13 datasheet(171/370 Pages) EXAR

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M13 MULTIPLEXER/CLEAR CHANNEL DS3 FRAMER IC

XRT72L13

PRELIMINARY

REV. 1.0.6

159

Setting this bit-field to “1” enables this interrupt. Con-

versely, setting this bit-field to “0” disables this inter-

rupt.

Bit 3 - DS2 FERF (Far-End-Receive Failure) Inter-

rupt Enable.

This “Read/Write” bit-field permits the user to enable

or disable the “DS2 Far-End Receive Failure” Inter-

rupt.

Setting this bit-field to “1” enables this interrupt. Con-

versely, setting this bit-field to “0” disables this inter-

rupt.

Bit 2 - DS2 RED Alarm Interrupt Enable

This “Read/Write” bit-field permits the user to enable

or disable the “DS2 RED Alarm” Interrupt.

Setting this bit-field to “1” enables this interrupt. Con-

versely, setting this bit-field to “0” disables this inter-

rupt.

Bit 1 - DS2 AIS Interrupt Enable

This “Read/Write” bit-field permits the user to enable

or disable the “DS2 AIS” Interrupt.

Setting this bit-field to “1” enables this interrupt. Con-

versely, setting this bit-field to “0” disables this inter-

rupt.

Bit 0 - DS2 RESV Interrupt Enable.

To be provided in the next update.

2.3.2.114 DS2 # 1 Framer Interrupt Register

Bit 5 - Change in DS2 COFA (Change of Framing

Alignment) Interrupt Status

This “Reset-upon-Read” bit-field indicates whether or

not a change in the “DS2 COFA State” has occurred

since the last read of this register.

This bit-field will be set to “1” if a change in the DS2

COFA State has occurred since the last read of this

change in the DS2 COFA State has NOT occurred

since the last read of this register.

Bit 4 - Change in DS2 OOF (Out-of-Frame) Inter-

rupt Status

This “Reset-upon-Read” bit-field indicates whether or

not a change in the “DS2 Out-of-Frame State” has

occurred since the last read of this register.

This bit-field will be set to “1” if a change in the DS2

OOF State has occurred since the last read of this

change in the DS2 OOF State has NOT occurred

since the last read of this register.

Bit 3 - Change in DS2 FERF (Far-End Receive Fail-

ure) Interrupt Status

This “Reset-upon-Read” bit-field indicates whether or

not a change in the “DS2 FERF State” has occurred

since the last read of this register.

This bit-field will be set to “1” if a change in the DS2

FERF State has occurred since the last read of this

change in the DS2 FERF State has NOT occurred

since the last read of this register.

Bit 2 - Change in DS2 RED Alarm Interrupt Status

This “Reset-upon-Read” bit-field indicates whether or

not a change in the “DS2 RED Alarm State” has oc-

curred since the last read of this register.

This bit-field will be set to “1” if a change in the DS2

RED Alarm State has occurred since the last read of

this register. Conversely, this bit-field will be set to “0”

if a change in the DS2 RED Alarm State has NOT oc-

curred since the last read of this register.

Bit 1 - Change in DS2 AIS Interrupt Status

This “Reset-upon-Read” bit-field indicates whether or

not a change in the “DS2 AIS State” has occurred

since the last read of this register.

This bit-field will be set to “1” if a change in the DS2

AIS State has occurred since the last read of this reg-

ister. Conversely, this bit-field will be set to “0” if a

change in the DS2 AIS State has NOT occurred since

the last read of this register.

Bit 0 - Change in DS2 RESV Interrupt Status

DS2 # 1 FRAMER INTERRUPT REGISTER (ADDRESS = 0XA2)

BIT 7BIT 6BIT 5BIT 4BIT 3BIT 2BIT 1BIT 0

Unused

Change in

DS2 COFA

Interrupt

Status

Change in

DS2 OOF

Interrupt

Status

Change in

DS2 FERF

Interrupt

Status

Change in

DS2 RED

Alarm

Interrupt

Status

Change in

DS2 AIS

Interrupt

Status

Change in

DS2

RESV

Interrupt

Status

R/O

RUR

0000

000

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