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XRT72L13 Datasheet(PDF) 175 Page - Exar Corporation

Part # XRT72L13
Description  M13 MULTIPLEXER/CLEAR CHANNEL DS3 FRAMER IC
PDF  370 Pages
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Manufacturer  EXAR [Exar Corporation]
Direct Link  http://www.exar.com
Logo EXAR - Exar Corporation

XRT72L13 Datasheet(HTML) 175 Page - Exar Corporation

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M13 MULTIPLEXER/CLEAR CHANNEL DS3 FRAMER IC
XRT72L13
PRELIMINARY
REV. 1.0.6
163
This “Read/Write” bit-field permits the user to enable
or disable the “DS2 Far-End Receive Failure” Inter-
rupt.
Setting this bit-field to “1” enables this interrupt. Con-
versely, setting this bit-field to “0” disables this inter-
rupt.
Bit 2 - DS2 RED Alarm Interrupt Enable
This “Read/Write” bit-field permits the user to enable
or disable the “DS2 RED Alarm” Interrupt.
Setting this bit-field to “1” enables this interrupt. Con-
versely, setting this bit-field to “0” disables this inter-
rupt.
Bit 1 - DS2 AIS Interrupt Enable
This “Read/Write” bit-field permits the user to enable
or disable the “DS2 AIS” Interrupt.
Setting this bit-field to “1” enables this interrupt. Con-
versely, setting this bit-field to “0” disables this inter-
rupt.
Bit 0 - DS2 RESV Interrupt Enable.
To be provided in the next update.
2.3.2.120 DS2 # 3 Framer Interrupt Register
Bit 5 - Change in DS2 COFA (Change of Framing
Alignment) Interrupt Status
This “Reset-upon-Read” bit-field indicates whether or
not a change in the “DS2 COFA State” has occurred
since the last read of this register.
This bit-field will be set to “1” if a change in the DS2
COFA State has occurred since the last read of this
register. Conversely, this bit-field will be set to “0” if a
change in the DS2 COFA State has NOT occurred
since the last read of this register.
Bit 4 - Change in DS2 OOF (Out-of-Frame) Inter-
rupt Status
This “Reset-upon-Read” bit-field indicates whether or
not a change in the “DS2 Out-of-Frame State” has
occurred since the last read of this register.
This bit-field will be set to “1” if a change in the DS2
OOF State has occurred since the last read of this
register. Conversely, this bit-field will be set to “0” if a
change in the DS2 OOF State has NOT occurred
since the last read of this register.
Bit 3 - Change in DS2 FERF (Far-End Receive Fail-
ure) Interrupt Status
This “Reset-upon-Read” bit-field indicates whether or
not a change in the “DS2 FERF State” has occurred
since the last read of this register.
This bit-field will be set to “1” if a change in the DS2
FERF State has occurred since the last read of this
register. Conversely, this bit-field will be set to “0” if a
change in the DS2 FERF State has NOT occurred
since the last read of this register.
Bit 2 - Change in DS2 RED Alarm Interrupt Status
This “Reset-upon-Read” bit-field indicates whether or
not a change in the “DS2 RED Alarm State” has oc-
curred since the last read of this register.
This bit-field will be set to “1” if a change in the DS2
RED Alarm State has occurred since the last read of
this register. Conversely, this bit-field will be set to “0”
if a change in the DS2 RED Alarm State has NOT oc-
curred since the last read of this register.
Bit 1 - Change in DS2 AIS Interrupt Status
This “Reset-upon-Read” bit-field indicates whether or
not a change in the “DS2 AIS State” has occurred
since the last read of this register.
This bit-field will be set to “1” if a change in the DS2
AIS State has occurred since the last read of this reg-
ister. Conversely, this bit-field will be set to “0” if a
change in the DS2 AIS State has NOT occurred since
the last read of this register.
Bit 0 - Change in DS2 RESV Interrupt Status
To be provided in the next update.
DS2 # 3 FRAMER INTERRUPT REGISTER (ADDRESS = 0XA8)
BIT 7BIT 6BIT 5BIT 4BIT 3BIT 2BIT 1BIT 0
Unused
Change in
DS2 COFA
Interrupt
Enable
Change in
DS2 OOF
Interrupt
Enable
Change in
DS2 FERF
Interrupt
Enable
Change in
DS2 RED
Alarm
Interrupt
Enable
Change in
DS2 AIS
Interrupt
Enable
Change in
DS2
RESV
Interrupt
Enable
R/O
R/O
RUR
RUR
RUR
RUR
RUR
RUR
0
0000
000



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