XRT72L13 datasheet(191/370 Pages) EXAR

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XRT72L13

M13 MULTIPLEXER/CLEAR CHANNEL DS3 FRAMER IC

PRELIMINARY

REV. P1.0.6

179

3.2.2.1.2.2

The Motorola Mode Write Cycle

Whenever a Motorola-type µC/µP wishes to write a

byte or word of data into a register or buffer location,

within the Framer, it should do the following.

1. Assert the ALE_AS (Address Select) input pin by

toggling it "low". This step enables the "Address

Bus" input drivers (within the Framer chip).

2. Place the address of the "target" register or buffer

location (within the Framer), on the Address Bus

input pins, A[8:0].

3. While the µC/µP is placing this address value

onto the Address Bus, the Address-Decoding cir-

cuitry (within the user's system) should assert the

CS* (Chip Select) input pins of the Framer by tog-

gling it "low". This step enables further communi-

cation between the µC/µP and the Framer Micro-

processor Interface block.

4. After allowing the data on the Address Bus pins

to settle (by waiting the appropriate "Address

Setup" time), the µC/µP should toggle the

ALE_AS input pin "high". This step causes the

Framer device to "latch" the contents of the

"Address Bus" into its own circuitry. At this point,

the Address of the register or buffer location

(within the Framer), has now been selected.

5. Further, the µC/µP should indicate that this cur-

rent bus cycle is a "Write" operation by toggling

the WR_RW (R/W*) input pin "low".

6. The µC/µP should then place the byte or word

that it intends to write into the "target" register, on

the bi-directional data bus, D[7:0].

7. Next, the µC/µP should initiate the bus cycle by

toggling the Rd_DS (Data Strobe) input pin "low".

When the XRT72L13 DS3 Framer senses that

the WR_RW (R/W*) input pin is "high" and that

the Rd_DS (Data Strobe) input pin has toggled

"low", it will enable the "input drivers" of the bi-

directional data bus, D[7:0].

8. After waiting the appropriate time, for this newly

placed data to settle on the bi-directional data

bus (e.g., the "Data Setup" time) the Framer will

assert the Rdy_Dtck output signal.

9. After the µC/µP detects the Rdy_Dtck signal

(from the Framer), the µC/µP should toggle the

Rd_DS input pin "high". This action accom-

plishes two things.

a. It latches the contents of the bi-directional data

bus into the XRT72L13 DS3 Microprocessor

Interface block.

b. It terminates the "Write" cycle.

Figure 50 presents a timing diagram which illustrates

the behavior of the Microprocessor Interface signals,

during a "Motorola-type" Programmed I/O Write Op-

eration.

FIGURE 49. ILLUSTRATION OF THE BEHAVIOR OF MICROPROCESSOR INTERFACE SIGNALS, DURING A "MOTOROLA-

TYPE

" PROGRAMMED I/O READ OPERATION

ALE_AS

RDB_DS

A[8:0]

CS*

D[15:0]

Rdy_Dtck

Not Valid

Valid Data

Address of Target Register

WRB_RW

XRT72L13 Datasheet(PDF) 191 Page - Exar Corporation

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