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DP8344 Datasheet(PDF) 112 Page - National Semiconductor (TI) |
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DP8344 Datasheet(HTML) 112 Page - National Semiconductor (TI) |
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112 / 184 page ![]() 50 Device Specifications (Continued) TABLE 5-15 Latched Read of DMEM (Note 1) Symbol ID Parameter Formula Min Max Units tSU-RRR-CO 1 RAE REM-RD Falling before CLK-OUT Rising 22 ns tH-RRR-X 2 RAE REM-RD Rising after XACK Rising 0 ns tSU-CMD-RRR 3 CMD Valid before RAE REM-RD Falling 0 ns tH-CMD-RRR 4 CMD Invalid after RAE REM-RD Falling Ta 26 ns tPD-RRR-X 5 RAE REM-RD Falling to XACK Falling 26 ns tPD-Xf-LCLr 6 XACK Falling to LCL Rising (nLWa1)Tab5ns tPD-LCL-X 7 LCL Rising to XACK Rising (nDWa2)Tab10 8 ns tPD-Xr-LCLf 8 XACK Rising to LCL Falling Tab11 11 ns tPC-LCL-RD 9 LCL Rising to READ Falling Tab516 ns tPD-RD-X 10 READ Falling before XACK Rising (nDWa1)Tab15 ns tPD-X-RD 11 XACK Rising to READ Rising THab712 ns tAZ-AAD-LCL 12 A AD Disabled before LCL Rising TLab20 ns tZA-LCL-AAD 13 A AD Enabled after LCL Falling THab10 ns tW-RD 14 READ Low (nDWa1)TaTHab12 ns Note 1 All parameters are individually tested and guaranteed Interpreting this data by numerically adding two or more parameters to create a new timing specification may lead to invalid results TLF9336 – 69 FIGURE 5-15 Latched Read of DMEM 112 |
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