FDC37M607 datasheet(130/182 Pages) SMSC

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Table 54 - Chip Level Registers

ADDRESS

DESCRIPTION

STATE

TEST 4

Default = 0x00, on

Vcc POR

0x2B R/W

Test Modes: Reserved for SMSC. Users should not

write to this register, may produce undesired

results.

TEST 5

Default = 0x00, on

Vcc POR

0x2C R/W

Test Modes: Reserved for SMSC. Users should not

write to this register, may produce undesired

results.

TEST 1

Default = 0x00, on

Vcc POR

0x2D R/W

Test Modes: Reserved for SMSC. Users should not

write to this register, may produce undesired

results.

TEST 2

Default = 0x00, on

Vcc POR

0x2E R/W

Test Modes: Reserved for SMSC. Users should not

write to this register, may produce undesired

results.

TEST 3

Default = 0x00, on

Vcc POR

0x2F R/W

Test Modes: Reserved for SMSC. Users should not

write to this register, may produce undesired

results.

Note 1: To allow the selection of the configuration address to a user defined location, these

Configuration Address Bytes are used. There is no restriction on the address chosen, except that A0

is 0, that is, the address must be on an even byte boundary. As soon as both bytes are changed, the

configuration space is moved to the specified location with no delay (Note: Write byte 0, then byte 1;

writing CR27 changes the base address).

The configuration address is only reset to its default address upon a Hard Reset or Vcc POR.

Note: The default configuration address is either 3F0 or 370, as specified by the SYSOPT pin.

FDC37M607 Datasheet(PDF) 130 Page - SMSC Corporation

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