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TDA9554PS Datasheet(PDF) 70 Page - NXP Semiconductors |
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TDA9554PS Datasheet(HTML) 70 Page - NXP Semiconductors |
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70 / 125 page  2000 Jun 22 70 Philips Semiconductors Tentative Device Specification TV signal processor-Teletext decoder with embedded µ-Controller TDA955X/6X/8X PS/N1 series Table 56 Y-delay adjustment; note 1 Note 1. For an equal delay of the luminance and chrominance signal the delay must be set at a value of 160 ns. This is only valid for a CVBS signal without group delay distortions. Table 57 Brightness control Table 58 Saturation control Table 59 Contrast control Table 60 AGC take-over Table 61 Volume control YD0 to YD3 Y-DELAY YD3 YD3 × 160 ns + YD2 YD2 × 80 ns + YD1 YD1 × 80 ns + YD0 YD0 × 40 ns DAC SETTING CONTROL 0 correction −0.7V 20 no correction 3F correction +0.7V DAC SETTING CONTROL 0 colour off ( −52 dB) 17 saturation nominal 3F saturation +300% DAC SETTING CONTROL 0 RGB amplitude −14 dB 20 RGB amplitude nominal 3F RGB amplitude +6 dB DAC SETTING CONTROL 0 tuner take-over at IF input signal of 0.4 mV 3F tuner take-over at IF input signal of 80 mV DAC SETTING CONTROL 0 attenuation 80 dB 3F no attenuation Table 62 Colour decoder mode, note 1 Note 1. The decoder frequencies for the various standards are obtained from an internal clock generator which is synchronised by a 12 MHz reference signal which is obtained from the µ-Controller clock generator. These frequencies are: a) A: 4.433619 MHz b) B: 3.582056 MHz (PAL-N) c) C: 3.575611 MHz (PAL-M) d) D: 3.579545 MHz (NTSC-M) Table 63 PAL-SECAM/NTSC matrix Table 64 NTSC matrix CM3 CM2 CM1 CM0 DECODER MODE FREQ 0 0 0 0 PAL/NTSC/SECAM A 0 0 0 1 PAL/SECAM A 001 0 PAL A 0 0 1 1 NTSC A 0 1 0 0 SECAM 0 1 0 1 PAL/NTSC B 011 0 PAL B 0 1 1 1 NTSC B 1 0 0 0 PAL/NTSC/SECAM ABCD 1 0 0 1 PAL/NTSC C 101 0 PAL C 1 0 1 1 NTSC C 1 1 0 0 PAL/NTSC (Tri-Norma) BCD 1 1 0 1 PAL/NTSC D 111 0 PAL D 1 1 1 1 NTSC D MAT MATRIX POSITION 0 adapted to standard 1 PAL matrix MUS MATRIX POSITION 0 Japanese matrix 1 USA matrix |
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