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TDA9554PS Datasheet(PDF) 102 Page - NXP Semiconductors

Part # TDA9554PS
Description  TV signal processor-Teletext decoder with embedded m-Controller
PDF  125 Pages
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Manufacturer  PHILIPS [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo PHILIPS - NXP Semiconductors

TDA9554PS Datasheet(HTML) 102 Page - NXP Semiconductors

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2000 Jun 22
102
Philips Semiconductors
Tentative Device Specification
TV signal processor-Teletext decoder with
embedded
µ-Controller
TDA955X/6X/8X PS/N1 series
To prevent that the horizontal synchronisation is disturbed by anti copy signals like Macrovision the phase detector
is gated during the vertical retrace period so that pulses during scan have no effect on the output voltage. The width
of the gate pulse is about 22
µs. During weak signal conditions (noise detector active) the gating is active during the
complete scan period and the width of the gate pulse is reduced to 5.7
µs so that the effect of noise is reduced to a
minimum.
The output current of the phase detector in the various conditions are shown in Table 148.
44. The ICs have 2 protection inputs. The protection on the second phase detector pin is intended to be used as ‘flash’
protection. When this protection is activated the horizontal drive is switched-off immediately and then switched-on
again via the slow start procedure.
The protection on the EHT input is intended for overvoltage (X-ray) protection. When this protection is activated the
horizontal drive is directly switched-off (via the slow stop procedure).
The EHT protection input can also be used to switch-off the TV receiver in a correct way when it is switched off via
the mains power switch or when the power supply is interrupted by pulling the mains plug. This can be realised by
means of a detection circuit which monitors the main supply voltage of the receiver. When this voltage suddenly
decreases the EHT protection input must be pulled HIGH and then the horizontal drive is switched off via the slow
stop procedure. Whether the EHT capacitor is discharged in the overscan or not during the switch-off period depends
on the setting of the OSO bit (subaddress 25H, D4). See also note 62.
45. The control range indicates the maximum phase difference at the top and the bottom of the screen. Compared with
the phase position at the centre of the screen the maximum phase difference at the top and the bottom of the screen
is
±0.5 µs for both the parallelogram and the bow correction.
46. During switch-on the horizontal drive starts-up in a soft-start mode. The horizontal drive starts with a very short TON
time of the horizontal output transistor, the ‘off time’ of the transistor is identical to the ‘off time’ in normal operation.
The starting frequency during switch-on is therefore about 2 times higher than the normal value. The ‘on time’ is
slowly increased to the nominal value in a time of about 1175 ms (see Fig.45). The rather slow rise of the TON
between 75% and 100% of TON is introduced to obtain a sufficiently slow rise of the EHT for picture tubes with
Dynamic Astigmatic Focus (DAF) guns. When the nominal frequency is reached the PLL is closed in such a way that
only very small phase corrections are necessary. This ensures a safe operation of the output stage.
During switch-off the soft-stop function is active. This is realised by decreasing the TON of the output transistor
complimentary to the start-up behaviour. The switch-off time is about 43 ms (see Fig.45). When the ‘switch off
command’ is received the soft-stop procedure is started after a delay of about 2 ms. During the switch-off time the
EHT capacitor of the picture tube is discharged with a fixed beam current which is forced by the black current loop
(see also note 62). The discharge time is about 38 ms.
The horizontal output is gated with the flyback pulse so that the horizontal output transistor cannot be switched-on
during the flyback time.
47. The vertical blanking pulse in the RGB outputs has a width of 27 or 22 lines (50 or 60 Hz system). The vertical pulse
in the sandcastle pulse has a width of 14 or 9.5 lines (50 or 60 Hz system). This to prevent a phase distortion on top
of the picture due to a timing modulation of the incoming flyback pulse.
48. The timing pulses for the vertical ramp generator are obtained from the horizontal oscillator via a divider circuit.
During TV reception this divider circuit has 3 modes of operation:
a) Search mode ‘large window’.
This mode is switched on when the circuit is not synchronized or when a non-standard signal (number of lines
per frame outside the range between 311 and 314(50 Hz mode) or between 261 and 264 (60 Hz mode) is
received). In the search mode the divider can be triggered between line 244 and line 361 (approximately
45 to 64.5 Hz).



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