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8101 Datasheet(PDF) 119 Page - LSI Computer Systems |
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8101 Datasheet(HTML) 119 Page - LSI Computer Systems |
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119 / 172 page  Register Definitions 4-31 Copyright © 2000–2001 by LSI Logic Corporation. All rights reserved. RES Reserved [11:9], R/W Reserved for future IEEE use PS_DIR PS Pause Capable [8:7], R/W HDX Half-Duplex Capable 6, R/W FDX Full-Duplex Capable 5, R/W RES Reserved [4:0], R/W Reserved for future IEEE use. 4.3.19 Register 22–AutoNegotiation Base Page Receive Note: NP 15-bit occurs on the REGD15 pin. NP Next Page Enable 15, R PS_DIR PS Description 11 Capable of receive pause only 10 Capable of transmit pause only 01 Capable of transmit and receive pause 00 Not capable HDX Description 1 Capable of half duplex 0 Not capable FDX Description 1 Capable of full duplex 0 Not capable 15 14 13 12 11 9 8 7 6 5 4 0 NP ACK RF[2:1] RES PS_DIR PS HDX FDX RES NP Description 1 Next page exists 0 No next page |
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