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S5335 Datasheet(PDF) 140 Page - Applied Micro Circuits Corporation |
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S5335 Datasheet(HTML) 140 Page - Applied Micro Circuits Corporation |
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140 / 189 page ![]() S5335 – PCI Bus Controller, 3.3V Revision 5.01 – November 30, 2005 AMCC Confidential and Proprietary DS1657 140 Data Sheet PASS-THRU OVERVIEW The S5335 provides a simple registered access port to the PCI bus. Using a handshaking protocol with Add- On card logic, the PCI bus directly accesses resources on the Add-On. The Pass-Thru data transfer method is very useful for direct Add-On memory access, or accessing registers within peripherals on an Add-On board. Pass-Thru operation requires an external nv memory boot device to define and configure the S5335 Pass-Thru regions. The S5335 provides four user-configurable Pass-Thru regions. Each region corresponds to a PCI Configura- tion Base Address Register (BADR1-4). A region represents a block of address space (the block size is user-defined). Each block can be mapped into mem- ory or I/O space. Memory mapped regions can request to be located below 1 MByte (Real Mode address space for a PC). Each region also has a configurable bus width for the Add-On bus interface. An 8-, 16-, or 32-bit Add-On interface may be selected, for use with a variety of Add-On memory or peripheral devices. Pass-Thru features can be used only when the S5335 is a PCI target. As a target, the S5335 Pass-Thru mode supports single data transfers as well as burst transfers. When accessed with burst transfers, the S5335 supports data transfers at the full PCI band- width. The data transfer rate is only limited by the PCI initiator performing the access and the speed of the Add-On logic. FUNCTIONAL DESCRIPTION To provide the PCI bus Add-On with direct access to Add-On resources, the S5335 has an internal Pass- Thru Address Register (APTA), and a Pass-Thru Data Register (APTD). These registers are connected to both the PCI bus interface and the Add-On bus inter- face. This allows a PCI initiator to perform Pass-Thru writes (data transferred from the PCI bus to the Add- On bus) or Pass-Thru reads (PCI bus requests data from the Add-On bus). The S5335 Pass-Thru interface supports both single cycle (one data phase) and burst accesses (multiple data phases). Pass-Thru Transfers Data transfers between the PCI bus and the Add-On using the Pass-Thru interface are implemented with a handshaking scheme. If the PCI bus writes to an S5335 Pass-Thru region, Add-On logic must read the data from the S5335 and store it on the Add-On. If the PCI bus reads from a Pass-Thru region, Add-On logic must write data to the S5335. Some applications may require that an address be passed to the Add-On for Pass-Thru accesses. For example, a 4 Kbyte Pass-Thru region on the PCI bus may correspond to a 4 Kbyte block of SRAM on the Add-On card. If a PCI initiator accessed this region, the Add-On would need to know the offset within the memory device to access. The Pass-Thru Address Register (APTA) allows the Add-On to access address information for the current PCI cycle. When the PCI bus performs burst accesses, the APTA register is updated by the S5335 to reflect the address of the cur- rent data phase. For PCI writes to the Add-On, the S5335 transfers the data from the PCI bus into the Pass-Thru Data Regis- ter (APTD). The S5335 captures the data from the PCI bus when TRDY# is asserted. The PCI bus then becomes available for other transfers. When the Pass- Thru data register becomes full, the S5335 asserts the Pass-Thru status signals to indicate to the Add-On that data is present. The Add-On logic may read the data register and assert PTRDY# to indicate the current access is complete. Until the current access com- pletes, the S5335 responds to further Pass-Thru accesses with retries. For PCI reads from the Add-On, the S5335 asserts the Pass-Thru status signals to indicate to the Add-On that data is required. The Add-On logic should write to the Pass-Thru Data Register and assert PTRDY# to com- plete the access. The S5335 does not assert TRDY# to the PCI bus until PTRDY# is asserted by Add-On logic. If the Add-On cannot provide data quickly enough, the S5335 signals a retry to the PCI bus. This allows the PCI bus to perform other tasks, rather than waiting for a slow target. |
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