SH7616 datasheet(118/935 Pages) RENESAS

118 / 935 page

Section 2 CPU

Rev. 2.00 Mar 09, 2006 page 92 of 906

REJ09B0292-0200

Table 2.31 shows the correspondence between the DSP data transfer operands and registers. CPU

core registers are used as pointer addresses indicating memory addresses.

Table 2.31 Correspondence between DSP Data Transfer Operands and Registers

SH (CPU Core) Registers

Oper-

and

(As2)

(As3)

(Ax0)

(As0)

(Ax1)

(As0)

(Ay0)

(Ay1)

(Ix)

(Is)

(Iy)

———

—

Yes

—

Ix (Is)

—

——

—

Yes

—

——

—

——

—Yes

Yes

—

——

—

Yes

—

——

—

——

—

Yes

—

——

—

Oper-

DSP Registers

and

Y0Y1M0

A0G

A1G

—

————————

Ix (Is)

—

————————

Yes

————————

—

————————

—

————————

—

Yes

——————

—

————Yes

Yes

—

————————

Yes

Note: Yes indicates that the register can be set.

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