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SH7616 Datasheet(PDF) 167 Page - Renesas Technology Corp |
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SH7616 Datasheet(HTML) 167 Page - Renesas Technology Corp |
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167 / 935 page ![]() Section 4 Exception Handling Rev. 2.00 Mar 09, 2006 page 141 of 906 REJ09B0292-0200 4.7 Stack Status after Exception Handling The status of the stack after exception handling ends is as shown in table 4.11. Table 4.11 Stack Status after Exception Handling Type Stack Status Address error SP → Address of instruction after executed instruction 32 bits SR 32 bits Trap instruction SP → Address of instruction after TRAPA instruction 32 bits SR 32 bits General illegal instruction SP → Start address of illegal instruction 32 bits SR 32 bits Interrupt SP → Address of instruction after executed instruction 32 bits SR 32 bits Illegal slot instruction SP → Jump destination address of delayed branch instruction 32 bits SR 32 bits |
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