SH7616 datasheet(164/935 Pages) RENESAS

164 / 935 page

Section 4 Exception Handling

Rev. 2.00 Mar 09, 2006 page 138 of 906

REJ09B0292-0200

4.5.3

Illegal Slot Instructions

An instruction placed immediately after a delayed branch instruction is said to be placed in a delay

slot. If the instruction placed in the delay slot is undefined code, illegal slot exception handling

begins when the undefined code is decoded. Illegal slot exception handling is also started when an

instruction that rewrites the program counter (PC) is placed in a delay slot. The exception handling

starts when the instruction is decoded. The CPU handles an illegal slot instruction as follows:

1. The status register (SR) is saved to the stack.

2. The program counter (PC) is saved to the stack. The PC value saved is the jump address of the

delayed branch instruction immediately before the undefined code or the instruction that

rewrites the PC.

3. The exception service routine start address is fetched from the exception vector table entry that

corresponds to the exception that occurred. That address is jumped to and the program starts

executing. The jump that occurs is not a delayed branch.

4.5.4

General Illegal Instructions

When undefined code placed anywhere other than immediately after a delayed branch instruction

(i.e., in a delay slot) is decoded, general illegal instruction exception handling starts. The CPU

handles general illegal instructions in the same way as illegal slot instructions. Unlike processing

of illegal slot instructions, however, the program counter value saved is the start address of the

undefined code.

SH7616 Datasheet(PDF) 164 Page - Renesas Technology Corp