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SH7616 Datasheet(PDF) 229 Page - Renesas Technology Corp |
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SH7616 Datasheet(HTML) 229 Page - Renesas Technology Corp |
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229 / 935 page  Section 6 User Break Controller (UBC) Rev. 2.00 Mar 09, 2006 page 203 of 906 REJ09B0292-0200 6.2 Register Descriptions 6.2.1 Break Address Register A (BARA) BARAH Bit: 15 14 13 12 11 10 9 8 BAA31 BAA30 BAA29 BAA28 BAA27 BAA26 BAA25 BAA24 Initial value: 0 0 0 0 0 0 0 0 R/W: R/W R/W R/W R/W R/W R/W R/W R/W Bit: 76 543 210 BAA23 BAA22 BAA21 BAA20 BAA19 BAA18 BAA17 BAA16 Initial value: 0 0 0 0 0 0 0 0 R/W: R/W R/W R/W R/W R/W R/W R/W R/W BARAL Bit: 15 14 13 12 11 10 9 8 BAA15 BAA14 BAA13 BAA12 BAA11 BAA10 BAA9 BAA8 Initial value: 0 0 0 0 0 0 0 0 R/W: R/W R/W R/W R/W R/W R/W R/W R/W Bit: 76 543 210 BAA7 BAA6 BAA5 BAA4 BAA3 BAA2 BAA1 BAA0 Initial value: 0 0 0 0 0 0 0 0 R/W: R/W R/W R/W R/W R/W R/W R/W R/W Break address register A (BARA) consists of two 16-bit readable/writable registers: break address register AH (BARAH) and break address register AL (BARAL). BARAH specifies the upper half (bits 31 to 16) of the address used as a channel A break condition, and BARAL specifies the lower half (bits 15 to 0). BARAH and BARAL are initialized to H'0000 by a power-on reset; after a manual reset, their values are undefined. BARAH Bits 15 to 0—Break Address A31 to A16 (BAA31 to BAA16): These bits store the upper half (bits 31 to 16) of the address used as a channel A break condition. BARAL Bits 15 to 0—Break Address A15 to A0 (BAA15 to BAA0): These bits store the lower half (bits 15 to 0) of the address used as a channel A break condition. |
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