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HD6433713 Datasheet(PDF) 163 Page - Renesas Technology Corp |
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HD6433713 Datasheet(HTML) 163 Page - Renesas Technology Corp |
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163 / 324 page ![]() 3. Timer load register C (TLC) TLC is an 8-bit write-only register for setting the reload value of TCC. When a reload value is set in TLC, the same value is loaded into timer counter C (TCC) as well, and TCC starts counting up or down from that value. When TCC overflows or underflows during operation in auto-reload mode, the TLC value is loaded in TCC. Accordingly, overflow and underflow periods can be set within the range of 1 to 256 input clocks. The same address is allocated to TLC as to TCC. Upon reset, TLC is initialized to H'00. 8.4.3 Timer Operation Timer C is an 8-bit multifunction timer. It can be used as an interval timer, an auto-reload timer, or an event counter. (Event counting requires an input pin setting.) 1. Timer C operation modes Timer C is an 8-bit up-/down-counter which is incremented or decremented each time a clock pulse is input. The two operation modes, interval and auto-reload, are explained below. • Interval timer operation When bit TMC7 in timer mode register C (TMC) is cleared to 0, timer C functions as an 8-bit interval timer. Upon reset, timer counter C (TCC) is initialized to H'00 and TMC to H'18, so up-counting and interval timing resume immediately after the reset. The clock input to timer C is selected from seven internal clock signals output by prescaler S, or an external clock input at pin P11/IRQ1. The selection is made by bits TMC2 to TMC0 in TMC. Either software or hardware can control whether TCC counts up or down. The selection is made by TMC bits TMC6 and TMC5. Bit Initial value Read/Write 7 TLC7 0 W 6 TLC6 0 W 5 TLC5 0 W 4 TLC4 0 W 3 TLC3 0 W 0 TLC0 0 W 2 TLC2 0 W 1 TLC1 0 W 152 |
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