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HD6433713 Datasheet(PDF) 206 Page - Renesas Technology Corp |
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HD6433713 Datasheet(HTML) 206 Page - Renesas Technology Corp |
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206 / 324 page  Bit 0: Start/busy flag (STF) Setting bit 0 to 1 starts an SCI2 transfer operation. This bit stays at 1 during the transfer, and is cleared to 0 after the transfer is complete. It can therefore be used as a busy flag as well. Clearing this bit to 0 during a transfer aborts the transfer, initializing SCI2. The contents of the 32-byte data buffer and of registers other than STSR are unchanged when this happens. Bit 0 STF Explanation 0 [Read access] (initial value) Indicates transfer not in progress. [Write access] Stops transfer. 1 [Read access] Indicates transfer in progress. [Write access] Starts transfer. 11.2.5 Port Mode Register 3 (PMR3) PMR3 is an 8-bit read/write register, for enabling the PMOS transistors of SCI1 and SCI2 data output pins (pin P93/SO1 and pin P96/SO2), and for controlling SCI2 chip select output (pin SI2/CS). Upon reset, PMR3 is initialized to H'97. For bit 3, see 10.2.6, Port Mode Register 3 (PMR3). Bit 7: Reserved bit Bit 7 is reserved; it always reads 1, and cannot be modified. Bit Initial value Read/Write 7 — 1 — 6 0 R/W 5 CS 0 R/W 4 — 1 — 3 0 R/W 0 — 1 — 2 — 1 — 1 — 1 — SO2 PMOS SO1 PMOS 195 |
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