DS26521 datasheet(255/258 Pages) MAXIM

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DS26521 Single T1/E1/J1 Transceiver

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13.3

JTAG ID Codes

Table 13-2. ID Code Structure

DEVICE

REVISION

ID[31:28]

DEVICE CODE

ID[27:12]

MANUFACTURER’S CODE

ID[11:1]

REQUIRED

ID[0]

DS26521

Consult factory

0000000010001000

00010100001

DS26522

Consult factory

0000000010001001

00010100001

13.4

Test Registers

IEEE 1149.1 requires a minimum of two test registers: the bypass register and the boundary scan register. An

optional test register has been included with the DS26521 design. This test register is the identification register and

is used in conjunction with the IDCODE instruction and the Test-Logic-Reset state of the TAP controller.

13.4.1 Boundary Scan Register

This register contains both a shift register path and a latched parallel output for all control cells and digital I/O cells,

and is n bits in length.

13.4.2 Bypass Register

This is a single one-bit shift register used in conjunction with the BYPASS, CLAMP, and HIGHZ instructions, which

provides a short path between JTDI and JTDO.

13.4.3 Identification Register

The identification register contains a 32-bit shift register and a 32-bit latched parallel output. This register is

selected during the IDCODE instruction and when the TAP controller is in the Test-Logic-Reset state.

DS26521 Datasheet(PDF) 255 Page - Maxim Integrated Products