AD9558 datasheet(85/104 Pages) AD

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Data Sheet

AD9558

Rev. A | Page 85 of 104

REFERENCE INPUTS (REGISTER 0x0500 TO REGISTER 0x0507)

Table 74. Reference Power-Down1

Address

Bits

Bit Name

Description

[7:4]

Reserved

Default: 0x0

REFD power-down

Power down REFD input receiver (default: not powered down).

REFC power-down

Power down REFC input receiver (default: not powered down).

REFB power-down

Power down REFB input receiver (default: not powered down).

0x0600

REFA power-down

Power down REFA input receiver (default: not powered down).

1 When all bits are set the reference receiver section enters a deep sleep mode.

Table 75. Reference Logic Family

Address

Bits

Bit Name

Description

[7:6]

REFD logic family

Select logic family for REFD input receiver; only REFD_P is used in CMOS mode

00 (default) = differential

01 = 1.2 V to 1.5 V CMOS

10 = 1.8 V to 2.5 V CMOS

11 = 3.0 V to 3.3 V CMOS

[5:4]

REFC logic family

Same as Register 0x0601[7:6] for REFC

[3:2]

REFB logic family

Same as Register 0x0601[7:6] for REFB

0x0601

[1:0]

REFA logic family

Same as Register 0x0601[7:6] for REFA

Table 76. Reference Priority Setting

Address

Bits

Bit Name

Description

0x0602

[7:6]

REFD priority family

User-assigned priority level (0 to 3) of the reference associated with REFB, which ranks that

reference relative to the others.

00 (default) = 0.

01 = 1.

10 = 2.

11 = 3.

[5:4]

REFC priority family

Same as Register 0x0602[7:6] for REFC.

[3:2]

REFB priority family

Same as Register 0x0602[7:6] for REFB.

[1:0]

REFA priority family

Same as Register 0x0602[7:6] for REFA.

AD9558 Datasheet(PDF) 85 Page - Analog Devices

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