AD9558 datasheet(24/104 Pages) AD

24 / 104 page

AD9558

Data Sheet

Rev. A | Page 24 of 104

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–27

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–9

–6

–3

100

10k

100k

LOOP BW = 100Hz;

HIGH PHASE MARGIN;

PEAKING: 0.06dB; –3dB: 69Hz

LOOP BW = 2kHz;

HIGH PHASE MARGIN;

PEAKING: 0.097dB; –3dB: 1.23kHz

LOOP BW = 5kHz;

HIGH PHASE MARGIN;

PEAKING: 0.14dB; –3dB: 4.27kHz

FREQUENCY OFFSET (Hz)

–0.2

0.2

0.6

1.0

1.4

1.8

2.2

2.6

3.0

3.4

–1

012

3456

789 10 11 12 13 14 15

TIME (ns)

10pF LOAD

2pF LOAD

Figure 25. Output Waveform,

3.3 V CMOS (100 MHz, Strong Mode)

Figure 28. Closed-Loop Transfer Function for 100 Hz, 2 kHz, and 5 kHz Loop

Bandwidth Settings; High Phase Margin Loop Filter Setting

(This is compliant with Telcordia GR-253 jitter transfer test for loop

bandwidths < 2 kHz.)

–1

012

3456

789 10 11 12 13 14 15

TIME (ns)

–0.1

0.1

0.3

0.5

0.7

0.9

1.1

1.3

1.5

1.7

1.9

10pF LOAD

2pF LOAD

–30

–27

–24

–21

–18

–15

–12

–9

–6

–3

100

FREQUENCY OFFSET (Hz)

10k

100k

LOOP BW = 100Hz;

NORMAL PHASE MARGIN;

PEAKING: 0.09dB; –3dB: 117Hz

LOOP BW = 2kHz;

NORMAL PHASE MARGIN;

PEAKING: 1.6dB; –3dB: 2.69kHz

Figure 26. Output Waveform, 1.8 V CMOS (100 MHz)

Figure 29. Closed-Loop Transfer Function for 100 Hz and 2 kHz Loop

Bandwidth Settings; Normal Phase Margin Loop Filter Setting

0.4

0.8

1.2

1.6

2.0

2.4

2.8

3.2

–5

25354555

65758595

TIME (ns)

10pF LOAD

2pF LOAD

Figure 27. Output Waveform, 3.3 V CMOS (20 MHz, Weak Mode)

AD9558 Datasheet(PDF) 24 Page - Analog Devices

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