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XRT72L13 Datasheet(PDF) 159 Page - Exar Corporation

Part # XRT72L13
Description  M13 MULTIPLEXER/CLEAR CHANNEL DS3 FRAMER IC
PDF  370 Pages
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Manufacturer  EXAR [Exar Corporation]
Direct Link  http://www.exar.com
Logo EXAR - Exar Corporation

XRT72L13 Datasheet(HTML) 159 Page - Exar Corporation

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M13 MULTIPLEXER/CLEAR CHANNEL DS3 FRAMER IC
XRT72L13
PRELIMINARY
REV. 1.0.6
147
2.3.2.99 M12 DS2 # 1 Loopback Interrupt/Inter-
rupt Enable Register
Bit 7 - DS1 Channel 3 Loop-back Request Inter-
rupt Status
This “Reset-upon-Read” bit-field indicates whether
the “DS1 Channel 3 Loop-back Request” interrupt
has occurred or not.
This bit-field will be set to “1” if the “DS1 Channel 3
Loop-back Request Interrupt” has occurred since the
last read of this register.
This bit-field will be set to “0” if the “DS1 Channel 3
Loop-back Request” interrupt has NOT occurred
since the last read of this register.
NOTE: This bit-field is ignored if the XRT72L13 is config-
ured to operate in the “ITU-T G.747 Mode”.
Bit 6 - DS1 Channel 2 Loop-back Request Inter-
rupt Status
This “Reset-upon-Read” bit-field indicates whether
the “DS1 Channel 2 Loop-back Request” interrupt
has occurred or not.
This bit-field will be set to “1” if the “DS1 Channel 2
Loop-back Request Interrupt” has occurred since the
last read of this register.
This bit-field will be set to “0” if the “DS1 Channel 2
Loop-back Request” interrupt has NOT occurred
since the last read of this register.
Bit 5 - DS1 Channel 1 Loop-back Request Inter-
rupt Status
This “Reset-upon-Read” bit-field indicates whether
the “DS1 Channel 1 Loop-back Request” interrupt
has occurred or not.
This bit-field will be set to “1” if the “DS1 Channel 1
Loop-back Request Interrupt” has occurred since the
last read of this register.
This bit-field will be set to “0” if the “DS1 Channel 1
Loop-back Request” interrupt has NOT occurred
since the last read of this register.
Bit 4 - DS1 Channel 0 Loop-back Request Inter-
rupt Status
This “Reset-upon-Read” bit-field indicates whether
the “DS1 Channel 0 Loop-back Request” interrupt
has occurred or not.
This bit-field will be set to “1” if the “DS1 Channel 0
Loop-back Request Interrupt” has occurred since the
last read of this register.
This bit-field will be set to “0” if the “DS1 Channel 0
Loop-back Request” interrupt has NOT occurred
since the last read of this register.
Bit 3 - DS1 Channel 3 Loop-back Request Inter-
rupt Enable
This “Read/Write” bit-field permits the user to enable
or disable the “DS1 Channel 3 Loop-back Request”
Interrupt.
Setting this bit to “0” disables this interrupt. Con-
versely, setting this bit to “1” enables this interrupt.
NOTE: This bit-field is ignored if the XRT72L13 is config-
ured to operate in the “ITU-T G.747 Mode”.
Bit 2 - DS1 Channel 2 Loop-back Request Inter-
rupt Enable
This “Read/Write” bit-field permits the user to enable
or disable the “DS1 Channel 2 Loop-back Request”
Interrupt.
Setting this bit to “0” disables this interrupt. Con-
versely, setting this bit to “1” enables this interrupt.
Bit 1 - DS1 Channel 1 Loop-back Request Inter-
rupt Enable
This “Read/Write” bit-field permits the user to enable
or disable the “DS1 Channel 1 Loop-back Request”
Interrupt.
Setting this bit to “0” disables this interrupt. Con-
versely, setting this bit to “1” enables this interrupt.
M12 DS2 # 1 LOOP-BACK INTERRUPT/INTERRUPT ENABLE REGISTER (ADDRESS = 0X93)
BIT 7BIT 6BIT 5BIT 4BIT 3BIT 2BIT 1BIT 0
DS1
Channel 3
Loop-back
Request
Interrupt
Status
DS1
Channel 2
Loop-back
Request
Interrupt
Status
DS1
Channel 1
Loop-back
Request
Interrupt
Status
DS1
Channel 0
Loop-back
Request
Interrupt
Status
DS1
Channel 3
Loop-back
Request
Interrupt
Enable
DS1
Channel 2
Loop-back
Request
Interrupt
Enable
DS1
Channel 1
Loop-back
Request
Interrupt
Enable
DS1
Channel 0
Loop-back
Request
Interrupt
Enable
RUR
RUR
RUR
RUR
R/W
R/W
R/W/
R/W
0
0000
000



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