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DP8344 Datasheet(PDF) 143 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
Part # DP8344
Description  Biphase Communications Processor?좦CP
PDF  184 Pages
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Manufacturer  NSC [National Semiconductor (TI)]
Direct Link  http://www.national.com
Logo NSC - National Semiconductor (TI)

DP8344 Datasheet(HTML) 143 Page - National Semiconductor (TI)

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60 Reference Section (Continued)
JRMK
Relative Jump with Rotate and
Mask on Register
Syntax
JRMK
Rs b m
register
Affected Flags
None
Description
Transfers control to the instruction at the memory address
calculated by adding the contents of the Program Counter
to a specially formed displacement The displacement is
formed by rotating a copy of the source register Rs the val-
ue of b bits to the right masking (setting to zero) the most
significant m bits masking the least significant bit and then
sign extending the result to 16 bits Typically the JRMK
instruction transfers control into a jump table The LSB of
the displacement is always set to zero so that the jump table
may contain two word instructions (eg LJMP) The range
of JRMK is from a126 to b128 relative to the Program
Counter Note that the Program Counter initially contains
the memory address of the next instruction following JRMK
The source register Rs may specify any active CPU register
The rotate value b may be from 0 to 7 where 0 causes no
bit rotation to occur The mask value m may be from 0 to 7
where me0 causes only the LSB of the displacement to be
masked me1 causes the MSB and the LSB to be masked
me2 causes bits 7 – 6 and the LSB to be masked etc
Example
This example demonstrates the decoding of the address
frame of the 3299 Terminal Multiplexer protocol In the ad-
dress frame only the bits 4 – 2 contain the address of the
Logical Unit
EXX
01
select main A alt B
JRMK
RTR14
decode device address
LJMP
ADDR0
jump to device handler
0
LJMP
ADDR1
jump to device handler
1
LJMP
ADDR2
jump to device handler
2
LJMP
ADDR7
jump to device handler
7
Instruction Format
10000
Opcode
m
b
Rs
15
10
7
4
0
T-states
4
Bus Timing
Figure 6-4
Operation
Copy Rs to a temporary register
Rs
xregister
Rotate the register b bits to the right
TLF9336 – 8
Mask the most significant m bits and the LSB
m
V W
register AND 0
01
10
xregister
Modify the Program Counter
PC a register(sign extended)
xPC
143



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