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DP8344 Datasheet(PDF) 145 Page - National Semiconductor (TI) |
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DP8344 Datasheet(HTML) 145 Page - National Semiconductor (TI) |
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145 / 184 page  60 Reference Section (Continued) LJMP Conditional Long Jump Syntax LJMP Rs p s nn register absolute Affected Flags None Description Conditionally transfers control to the instruction at the abso- lute memory address nn if the bit in position p of register Rs is equal to the state of the bit s The operand Rs may speci- fy any active CPU register The value of p may be from 0 to 7 where 0 corresponds to the LSB of Rs and 7 corresponds to the MSB of Rs The absolute value nn is 16 bits long (range 0 to 64k) therefore all of instruction memory can be addressed Example Long Jump to one of the receiver error handling routines based on the contents of the Error Code Register ECR EXX 013 select main A alt B and clear GIE OR 01000000BTSR set SEC in TSR MOVE ECR R11 read ECR Determine error condition LJMP R11 0 1 Software error LJMP R11 1 1 Loss of Midbit LJMP R11 2 1 Invalid Ending Seq LJMP R11 3 1 Parity error LJMP R11 4 1 Software error Instruction Format 1000110 Opcode s p Rs 15 8 7 4 0 nn 15 0 T-states (2 a 2) Bus Timing Figure 6-3 Operation If Rs p e s then nn xPC LJMP Unconditional Long Jump Syntax LJMP nn absolute LJMP Ir indexed Affected Flags None Description Unconditionally transfers control to the instruction at the memory address specified by the operand The operand may either specify an absolute instruction address nn (16 bits long) or an index register Ir which contains an instruc- tion address Long Jump’s addressing range is from 0 to 64k (ie all of instruction memory can be addressed) Example Transfer control to the instruction labeled ‘‘ResetSystem’’ which may be located anywhere in instruction memory LJMP ResetSystem go reset the system Instruction Format LJMP nn 1100111000000000 Opcode 15 0 nn 15 0 LJMP Ir 110011010 00000 Opcode Ir 15 6 v 40 00IW 01IX 10IY 11IZ T-states LJMP nn (2 a 2) LJMP Ir 2 Bus Timing LJMP nn Figure 6-3 LJMP Ir Figure 6-1 Operation LJMP nn nn xPC LJMP Ir Ir xPC 145 |
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