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GX1 Datasheet(PDF) 68 Page - National Semiconductor (TI) |
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GX1 Datasheet(HTML) 68 Page - National Semiconductor (TI) |
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68 / 247 page  www.national.com 68 Revision 1.0 Processor Programming (Continued) Figure 3-6. Selector Mechanisms 15 3 2 1 0 INDEX TI INSTRUCTION OFFSET Segment Selector Segment Descriptor Base GDT or LDT Descriptor Table Main Memory Segment p RPL + Linear Address Address Physical Address 15 0 INDEX INSTRUCTION OFFSET Logical Address Base Main Memory Segment p + Linear Address Address Physical Address x16 p = Paging mechanism for virtual 8086 mode only Address Logical Segment Selector Logical Address ÷ 8 Real and Virtual 8086 Modes Protected Mode p = Paging mechanism |
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