GX1 datasheet(20/247 Pages) NSC

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Signal Definitions (Continued)

2.1

PIN ASSIGNMENTS

The tables in this section use several common abbrevia-

tions. Table 2-1 lists the mnemonics and their meanings.

Figure 2-2 shows the pin assignment for the 352 BGA with

Table 2-2 and Table 2-3 listing the pin assignments sorted

by pin number and alphabetically by signal name, respec-

tively.

Figure 2-3 shows the pin assignment for the 320 SPGA

with Table 2-4 and Table 2-5 listing the pin assignments

sorted by pin number and alphabetically by signal name,

respectively.

In Section 2.2 “Signal Descriptions” on page 31 a descrip-

tion of each signal is provided within its associated func-

tional group.

Table 2-1. Pin Type Definitions

Mnemonic

Definition

Standard input pin.

I/O

Bidirectional pin.

Totem-pole output.

Open-drain output structure that

allows multiple devices to share the

pin in a wired-OR configuration.

Pull-up resistor.

Pull-down resistor.

s/t/s

Sustained tri-state, an active-low tri-

state signal owned and driven by one

and only one agent at a time. The

agent that drives an s/t/s pin low

must drive it high for at least one

clock before letting it float. A new

agent cannot start driving an s/t/s

signal any sooner than one clock

after the previous owner lets it float.

A pull-up resistor on the motherboard

is required to sustain the inactive

state until another agent drives it.

VCC (PWR)

Power pin.

VSS (GND)

Ground pin.

The "#" symbol at the end of a signal

name indicates that the active, or

asserted state occurs when the sig-

nal is at a low voltage level. When "#"

is not present after the signal name,

the signal is asserted when at a high

voltage level.

t/s

Tri-state signal.

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