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BT8376EPF Datasheet(PDF) 97 Page - Synaptics Incorporated. |
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BT8376EPF Datasheet(HTML) 97 Page - Synaptics Incorporated. |
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97 / 323 page ![]() Bt8370/8375/8376 2.0 Circuit Description Fully Integrated T1/E1 Framer and Line Interface 2.9 Transmit Line Interface Unit N8370DSE Conexant 2-69 The TLIU can be used independently of the XMTR by applying P and N rail NRZ data to the TPOSI and TNEGI pins. Figure 2-34 shows the relationship between the P and N rail NRZ data, the transmit clock input, and XTIP/XRING. The transmit clock input can be supplied on the Transmit Clock Input pin (TCKI) or can be slaved to other clocks in the system using the Clock Input Mux register [CMUX; addr 01A]. This figure also shows the XTIP/XRING outputs being three-stated using the XOE pin. Figure 2-34. TLIU Waveform NOTE(S): Transmit jitter attenuation bypassed. TPOSI TCKI XTIP, XRING 13 4 5 2 6 TNEGI 7 8 1 2 3 4 5 6 7 8 XOE LCV LCV Throughput Delay |
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