AD4134 datasheet(37/92 Pages) AD

37 / 92 page

Data Sheet

AD4134

CIRCUIT INFORMATION

analog.com

Rev. 0 | 37 of 92

REFERENCE INPUT

Similar to the ADC inputs, the AD4134 reference input is also resis-

tive, which allows the external reference IC to drive the AD4134

directly without the need of a reference buffer. The user can directly

connect the external reference source to the REFCAP pin of the

AD4134.

Figure 66. Direct Reference Input Connection to REFCAP Pin

The user can reduce the noise on the reference source by filtering

the reference signal. An internal 20 Ω resistor between the REFIN

pin and the REFCAP pin enables the user to form a first-order RC

filter by connecting a capacitor on the REFCAP pin.

See the Reference Noise Filtering section for examples on how to

design the reference filter.

Figure 67. Reference Input Connection Using REFIN Pin

The series resistor creates a small voltage drop that varies with

the device mode of operation. In SPI control mode, the user can

configure the device to autocorrect this drop in different operating

modes by setting the REFIN_GAIN_CORR_EN bit to 1. The refer-

ence input current reduces by 1/4 with the disable of each individual

ADC channel. This reduction in current is also accounted for with

the reference autocorrection function.

The autocorrection function is disabled in pin control mode.

The reference input behaves with high impedance when the device

is powered down or in power down mode with the PDN pin low.

CLOCK INPUT

The AD4134 uses an internal oscillator during the initial power-up

configuration. After the AD4134 has completed the start-up routine,

a clock handover to the externally applied CLKIN occurs.

The AD4134 supports two master clock input options. The device

can accept an external CMOS clock signal or generate the clock

signal using an external crystal. The clock source is determined at

power-on by the state of the CLKSEL pin.

Tie the CLKSEL pin to the IOVDD pin and connect an external

crystal between the XTAL1 pin and the XTAL2/CLKIN pin to enable

the crystal clock option. Tie the CLKSEL pin to the IOGND pin and

connect an external CMOS clock signal to the XTAL2/CLKIN pin to

enable the CMOS clock option.

Figure 68. Master Clock Provided by a Crystal

Figure 69. Master Clock Provided by an Oscillator

XCLKOUT OUTPUT

When using the crystal clock option, a buffered output from the

internal crystal oscillator can be made available on the XCLKOUT

pin. Distribute this CMOS clock signal to other AD4134 devices in

the same system to allow multiple AD4134 devices to operate from

a single external crystal. The XLKCOUT pin can drive 45 pF of

load.

AD4134 Datasheet(PDF) 37 Page - Analog Devices

AD4134 Datasheet(HTML) 37 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92

Datasheet Download

Link URL