AD4134 datasheet(91/92 Pages) AD

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Data Sheet

AD4134

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Rev. 0 | 91 of 92

Table 103. Bit Descriptions for INTERNAL_ERROR

Bits

Bit Name

Settings

Description

Reset

Access

calculation, periodic CRC checks are performed on the on-chip registers. If the register contents have

changed, an error is flagged.

0 No memory map error.

1 Memory map error.

Address: 0x47, Reset: 0x00, Name: SPI Error

Table 104. Bit Descriptions for SPI Error

Bits

Bit Name

Settings

Description

Reset

Access

[7:4]

Reserved

Reserved.

0x0

ERR_SPI_CRC

SPI CRC Error Flag Indicates CRC Error During SPI Communications. This error reporting is

enabled using the ERR_SPI_CRC_EN bit in the diagnostic control register.

0x0

0 No CRC error.

1 CRC error detected.

ERR_SPI_SCLK_CNT

SCLK counter error flag indicates that the number of SCLK cycles during SPI communication is

not a multiple of eight.

0x0

0 No error.

1 SCLK counter error detected.

ERR_SPI_WRITE

SPI Write Error Flag Indicates Error During SPI Write Operation.

0x0

0 No error.

1 SPI write error.

ERR_SPI_READ

SPI Read Error Flag Indicates Error During SPI Read Operation.

0x0

0 No error.

1 Read error detected.

Address: 0x48, Reset: 0x00, Name: AIN_OR_ERROR

Table 105. Bit Descriptions for AIN_OR_ERROR

Bits

Bit Name

Settings

Description

Reset

Access

[7:4]

Reserved

Reserved.

0x0

ERR_OR_AIN3

Input Overvoltage Flag on Channel 3. When enabled, this bit detects the input voltage exceeding the

absolute value of VREF.

0x0

0 No overvoltage input detected.

1 Overvoltage input detected.

ERR_OR_AIN2

Input Overvoltage Flag on Channel 2. When enabled, this bit detects the input voltage exceeding the

absolute value of VREF.

0x0

0 No overvoltage input detected.

1 Overvoltage input detected.

ERR_OR_AIN1

Input Overvoltage Flag on Channel 1. When enabled, this bit detects the input voltage exceeding the

absolute value of VREF.

0x0

0 No overvoltage input detected.

1 Overvoltage input detected.

ERR_OR_AIN0

Input Overvoltage Flag on Channel 0. When enabled, this bit detects the input voltage exceeding the

absolute value of VREF.

0x0

0 No overvoltage input detected.

1 Overvoltage input detected.

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