AD4134 datasheet(63/92 Pages) AD

63 / 92 page

Data Sheet

AD4134

DIGITAL INTERFACE

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Rev. 0 | 63 of 92

The AD4134 digital interface consists of two independent parts:

an SPI for register access and device configuration, and a data

interface for sending out conversion data.

Figure 108. Communication Interface of AD4134

SPI

The SPI control mode is one of the two control modes supported

on the AD4134. The other mode is pin control mode. The user can

choose which mode to operate the device in by setting the logic

level on the PIN/SPI pin. Set the PIN/SPI pin high to enable the SPI

control mode, which enables the SPI of the device.

The AD4134 has a 4-wire SPI that is compatible with QSPI, MI-

CROWIRE, and DSPs. The interface operates in SPI Control Mode

0. In SPI Control Mode 0, the SCLK idles low, the falling edge of

the SCLK is the driving edge, and the rising edge of the SCLK is

the sampling edge. The output data on the SDO pin is clocked out

on the falling edge of SCLK and the input data on the SDI pin is

sampled on the rising edge of SCLK.

Figure 109. SCLK Edges

The SPI uses a 7-bit addressing scheme and supports three modes

of operation: 3-wire mode, 4-wire mode, and minimum I/O mode.

An optional CRC function is also available for improving communi-

cation robustness.

3-Wire Mode

In this mode, SDO is disabled and read data is available on the

DEC2/SDI pin. SDO is high impedance in the command, and the

data is shorted to SDI (see Figure 110).

Figure 110. 3-Wire Mode Write/Read Command

4-Wire Mode

The standard SPI consists of four signals, as shown in Figure 111.

Figure 111. 3-Wire and 4-Wire SPI Transaction Protocols

AD4134 Datasheet(PDF) 63 Page - Analog Devices