AD4134 datasheet(60/92 Pages) AD

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Data Sheet

AD4134

APPLICATIONS INFORMATION

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Rev. 0 | 60 of 92

78.6 nV/√Hz × √NBW < 3.14 µV rms

where NBW is the noise bandwidth.

The calculation shows that the noise bandwidth must be less than

1.6 kHz. The equivalent noise bandwidth of a first-order filter is

0.25/RC, in Hz.

The AD4134 has an internal 20 Ω resister between the REFIN pin

and the REFCAP pin. By connecting the output of the ADR444

to the REFIN input, a capacitor > 7.9 µF on the REFCAP pin is

sufficient to limit the reference noise to the desired value. It is

recommended to place a 10 µF capacitor on the REFCAP pin.

MULTIDEVICE SYNCHRONIZATION

The integrated ASRC of the AD4134 helps achieve multidevice syn-

chronization with a single low speed ODR line, giving less than 10

ns of phase matching between channels on different devices, which

makes it easy to synchronize. Applications like condition-based

monitoring, power quality analyzer, and sonar system demand tight

phase matching across high numbers of channels, making the

digital interface design complex.

The devices can be clocked with their own local clock sources yet

can achieve tight phase matching without the need of routing high

speed clock lines that adds to EMI issues. This clocking also means

that for applications demanding isolation, the user can pass fewer

low speed lines across the isolation barrier, as shown in Figure 100.

The AD4134 does not require the system clock across isolation to

synchronize isolated devices, which enables higher ODR in isolated

simultaneous sampling applications.

To achieve tight synchronization, the user must configure all the

devices in slave mode and use the SPI to set the DIG_IF_RESET

bit to reset the digital interface before the data capture. This

DIG_IF_RESET command must be given to all the slaves simulta-

neously using one single SPI write command.

Figure 100. Simplified Clocking in AD4134

COHERENT SAMPLING

The integrated ASRC of the AD4134 allows the user to set granular

sampling speeds from 0.01 kSPS to 1496 kSPS with a resolution

of 0.01 SPS. The ASRC allows the user to detect the line frequen-

cy and change the ODR so that there is a rational relationship

between the input signal frequency and the sampling speed.

Mathematically, coherent sampling is expressed as fIN/fODR = num-

ber of cycles in sampling window ÷ number of data points for FFT.

For example, fODR is 32 kSPS, fIN is 1 kHz, and the number of

samples is 512.

Number of cycles in the sampling window = 512 × 1000/32 kSPS =

16.

If the input frequency is 1.01 kHz, the ODR change is 4096 ×

1010/16 = 258.56 kSPS to achieve coherent sampling.

In applications like power metering and analysis, it is necessary to

achieve the required accuracy on the harmonic data and metering

parameters and ensure coherency between the ADC sampling rate

and the power line frequency.

LOW LATENCY DIGITAL CONTROL LOOP

The control loop demands low latency, but the antialias filter for

noise reduction adds significant delay, increasing the loop latency.

The inherent antialias rejection of the AD4134 removes the need of

the antialias filter, significantly reducing the signal chain latency.

The AD4134 supports throughput rates up to 1496 kSPS, making it

an optimal choice for low latency, 24-bit digital control loops.

AUTOMATIC GAIN CONTROL

The AD4134 has additional GPIO functionality when operated in

SPI control mode. One of the diagnostic features of the AD4134

enables GPIO7 to report any of the diagnostic errors by enabling

the ERR_PIN_OUT_EN bit.

The user can use GPIO7 to report any input overrange detection,

and based on the report the user can control the gain of the

front-end amplifier. Configure GPIO7 as an output and set the

ERR_PIN_EN_OR_AIN bit, which enables errors from input over-

range and enables error reporting on GPIO7. Wire the FRAME1/

GPIO7 pin to gain control of the amplifier.

Any input overrange above ±VREF on the input lines causes GPIO7

to go high, which brings down gain of the PGA, which reduces its

output below ±VREF. This control happens automatically without any

intervention of the digital host.

AD4134 Datasheet(PDF) 60 Page - Analog Devices

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