AD4134 datasheet(57/92 Pages) AD

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Data Sheet

AD4134

CALIBRATION

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In SPI control mode, the AD4134 offers the ability to calibrate offset

and gain individually for each channel. The user can alter the gain

and offset of the AD4134 and subsystem.

Each channel of the ADC has an associated gain and offset

coefficient that is stored for each ADC after factory programming.

The user can overwrite these gain and offset coefficients using the

gain and offset correction registers. However, after a reset or power

cycle, the gain and offset register values revert to the hard coded,

programmed factory setting.

These options are available in SPI control mode only.

OFFSET CALIBRATION

The offset correction registers provide 23-bit, signed, twos comple-

ment registers for channel offset adjustment. The offset setting for

each channel is enabled using the OFFSET_CAL_ EN_CHx bits.

The offset range is ±VREF with a step size of VREF/222. An LSB of

offset register adjustment changes the digital output by 2 LSBs. For

example, changing the offset register from 0 to 100 changes the

digital output by 200 LSBs.

For additional register information, see the OFFSET_CAL_

EN_CHx bit descriptions in Table 81, Table 87, Table 93, and Table

99.

GAIN CALIBRATION

The gain register is 20 bits with a range of ±50% and the LSB

applying a gain of 0.95 ppm. The gain setting for each channel is

enabled using the GAIN_CAL_SEL_CHx bits.

For additional register information, see the GAIN_CAL_ SEL_CHx

bit descriptions in Table 78, Table 84, Table 90, and Table 96.

AD4134 Datasheet(PDF) 57 Page - Analog Devices