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TW2864D Datasheet(PDF) 103 Page - Renesas Technology Corp

Part # TW2864D
Description  4-Channel Video Decoders and Audio Codecs For Security Applications
PDF  110 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

TW2864D Datasheet(HTML) 103 Page - Renesas Technology Corp

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TW2864
FN7745 Rev. 0.00
Page 103 of 110
September 28, 2012
SERIAL HOST INTERFACE TIMING
PARAMETER
SYMBOL
MIN
(NOTE 1)
TYP
MAX
(NOTE 1)
UNITS
Bus Free Time between STOP and START
tBF
740
ns
SDAT Setup Time
tsSDAT
100
ns
SDAT Hold Time
thSDAT
50
ns
Setup Time for START Condition
tsSTA
370
ns
Setup Time for STOP Condition
tsSTOP
370
ns
Hold Time for START Condition
thSTA
74
ns
Rise Time for SCLK and SDAT
tR
300
ns
Fall Time for SCLK and SDAT
tF
300
ns
Capacitive Load for Each Bus Line
CBUS
400
pF
LOW Period of SCL
tLOW
0.5
µs
HIGH Period of SCL
tHIGH
0.5
µs
SCLK Clock Frequency
fSCLK
400
KHz
NOTE:
1.
Compliance to datasheet limits is assured by one or more methods: production test, characterization and/or design.
Stop
Start
Data
Stop
Start
SDA
SCL
t
BF
t
hSTA
t
sSTO
t
sSTA
t
sSDAT
t
R
t
F
t
hSDAT
FIGURE 41. SERIAL HOST INTERFACE TIMING
This Serial Host Interface is also supporting old µs (MicroSecond) unit timing chip’s Serial Host Interface by more
higher speed logic design.
All
REV_ID
chips
have
an
equal
Serial
Host
Interface
timing.



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