SC1100 datasheet(59/348 Pages) NSC

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General Configuration Block (Continued)

3.5

CLOCK GENERATORS AND PLLS

This section describes the registers for the clocks required

by the GX1 and Core Logic modules, and how these clocks

are generated. See Figure 3-2 for a clock generation dia-

gram.

The clock generators are based on 32.768 KHz and 27.000

MHz crystal oscillators. The 32.768 KHz crystal oscillator is

described in Section 4.5.2 "RTC Clock Generation" on

page 80 (functional description of the RTC).

Figure 3-2. Clock Generation Block Diagram

32.768 KHz

Crystal

External PCI Clock

66.67 MHz

PLL5

Internal Fast-PCI Clock

57.273 MHz

FMUL3

ACPI Clock (14.318 MHz)

100-333 MHz

Core Clock

ADL

48 MHz

PLL4

USB Clock (48 MHz)

Divider

SDRAM Clock

32.768 KHz

and I/O Block Clock

Real-Time Clock (RTC)

24.576 MHz

PLL3

AC97_CLK

Divide

by 4

Divide

by 2

(33.3 MHz)

33 MHz

66 MHz

Oscillator

(24.576 MHz)

To PAD

Disable

27M

Shutdown

27 MHz

Crystal

Oscillator

48 MHz input

(ACPI)

High-Resolution Timer Clock

Not connected

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