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SC1100 Datasheet(PDF) 87 Page - National Semiconductor (TI) |
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SC1100 Datasheet(HTML) 87 Page - National Semiconductor (TI) |
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87 / 348 page ![]() Revision 1.1 87 www.national.com SuperI/O Module (Continued) Table 4-18. RTC Registers Bit Description Index 00h Seconds Register - SEC (R/W) Reset Type: VPP PUR Width: Byte 7:0 Seconds Data. Values may be 00 to 59 in BCD format or 00 to 3B in binary format. Index 01h Seconds Alarm Register - SECA (R/W) Reset Type: VPP PUR Width: Byte 7:0 Seconds Alarm Data. Values may be 00 to 59 in BCD format or 00 to 3B in binary format. When bits 7 and 6 are both set to one (“11”), unconditional match is selected. Index 02h Minutes Register - MIN (R/W) Reset Type: VPP PUR Width: Byte 7:0 Minutes Data. Values can be 00 to 59 in BCD format, or 00 to 3B in binary format. Index 03h Minutes Alarm Register - MINA (R/W) Reset Type: VPP PUR Width: Byte 7:0 Minutes Alarm Data. Values can be 00 to 59 in BCD format, or 00 to 3B in binary format. When bits 7 and 6 are both set to 1, unconditional match is selected. See Section 4.5.3.2 "Alarms" on page 82 for more information about “unconditional” matches. Index 04h Hours Register - HOR (R/W) Reset Type: VPP PUR Width: Byte 7:0 Hours Data. For 12-hour mode, values can be 01 to 12 (AM) and 81 to 92 (PM) in BCD format, or 01 to 0C (AM) and 81 to 8C (PM) in binary format. For 24-hour mode, values can be 0 to 23 in BCD format or 00 to 17 in binary format. Index 05h Hours Alarm Register - HORA (R/W) Reset Type: VPP PUR Width: Byte 7:0 Hours Alarm Data. For 12-hour mode, values may be 01 to 12 (AM) and 81 to 92 (PM) in BCD format or 01 to 0C (AM) and 81 to 8C (PM) in Binary format. For 24-hour mode, values may be 0 to 23 in BCD format or 00 to 17 in Binary format. When bits 7 and 6 are both set to one (“11”), unconditional match is selected. Index 06h Day of Week Register - DOW (R/W) Reset Type: VPP PUR Width: Byte 7:0 Day Of Week Data. Values may be 01 to 07 in BCD format or 01 to 07 in binary format. Index 07h Date of Month Register - DOM (R/W) Reset Type: VPP PUR Width: Byte 7:0 Date Of Month Data. Values may be 01 to 31 in BCD format or 01 to 1F in binary format. Index 08h Month Register - MON (R/W) Reset Type: VPP PUR Width: Byte 7-0 Month Data. Values may be 01 to 12 in BCD format or 01 to 0C in binary format. Index 09h Year Register - YER (R/W) Reset Type: VPP PUR Width: Byte 7:0 Year Data. Values may be 00 to 99 in BCD format or 00 to 63 in binary format. Index 0Ah RTC Control Register A - CRA (R/W) Reset Type: Bit Specific Width: Byte This register controls test selection, among other functions. This register cannot be written before reading bit 7 of CRD. 7 Update in Progress. (RO) This bit is not affected by reset. This bit reads 0 when bit 7 of the CRB register is 1. 0: Timing registers not updated within 244 µs. 1: Timing registers updated within 244 µs. 6:4 Divider Chain Control. These bits control the configuration of the divider chain for timing generation and register bank selection. See Table 4-19 on page 89. They are cleared to 000 as long as bit 7 of CRD is 0. 3:0 Periodic Interrupt Rate Select. These bits select one of fifteen output taps from the clock divider chain to control the rate of the periodic interrupt. See Table 4-20 on page 89 and Figure 4-7 on page 81. They are cleared to 000 as long as bit 7 of CRD is 0. |
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