SC1100 datasheet(94/348 Pages) NSC

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Revision 1.1

SuperI/O Module (Continued)

Table 4-27. Banks 0 and 1 - Common Control and Status Registers

Bit

Description

Offset 00h

Wakeup Events Status Register - WKSR (R/W1C)

Reset Value: 00h

Width: Byte

This register is set to 00h on power-up of VPP or software reset. It indicates which wakeup event occurred. (See Section 5.2.9.4 "Power

Management Events" on page 136.)

Reserved.

IRRX1 (CEIR) Event Status. This sticky bit shows the status of the CEIR event detection. This bit may be enabled only

when IRRX1 is selected on the ball, otherwise results are undefined.

0: Event not detected. (Default)

1: Event detected.

4:2

Reserved.

RI# Event Status. This sticky bit shows the status of RI# event detection. This bit may be enabled only when RI# is selected

on the ball, otherwise results are undefined.

0: Event not detected. (Default)

1: Event detected.

Reserved.

Offset 01h

Wakeup Events Control Register - WKCR (R/W)

Reset Value: 03h

Width: Byte

This register is set to 03h on power-up of VPP or software reset. Detected wakeup events that are enabled issue a power-up request the

ACPI controller and/or a PME to the Core Logic module. (See Section 5.2.9.4 "Power Management Events" on page 136.)

Reserved.

Reserved. Must be set to 0.

IRRX1 (CEIR) Event Enable. This bit may be enabled only when IRRX1 is selected on the ball, otherwise results are unde-

fined.

0: Disable. (Default)

1: Enable.

4:2

Reserved.

RI# Event Enable. This sticky bit shows the status of RI# event detection. This bit may be enabled only when RI# is

selected on the ball, otherwise results are undefined.

0: Disable.

1: Enable. (Default)

Reserved.

Offset 02h

Wakeup Configuration Register - WKCFG (R/W)

Reset Value: 00h

This register is set to 00h on power-up of VPP or software reset. It enables access to CEIR registers.

7:5

Reserved.

Reserved. Must be set to 0.

Reserved.

1:0

Configuration Bank Select Bits.

00: Only shared registers are accessible.

01: Shared registers and Bank 1 (CEIR) registers are accessible.

10: Bank selected.

1x: Reserved.

SC1100 Datasheet(PDF) 94 Page - National Semiconductor (TI)

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