SH7616 datasheet(111/935 Pages) RENESAS

111 / 935 page

Section 2 CPU

Rev. 2.00 Mar 09, 2006 page 85 of 906

REJ09B0292-0200

Instruction

Instruction Code

Operation

Cycles T Bit

LDS.L

@Rm+,DSR

0100mmmm01100110

(Rm)

→ DSR, Rm + 4 → Rm

—

LDS.L

@Rm+,A0

0100mmmm01110110

(Rm)

→ A0, Rm + 4 → Rm

—

LDS.L

@Rm+,X0

0100mmmm10000110

(Rm)

→ X0, Rm + 4 → Rm

—

LDS.L

@Rm+,X1

0100mmmm10010110

(Rm)

→ X1, Rm + 4 → Rm

—

LDS.L

@Rm+,Y0

0100mmmm10100110

(Rm)

→ Y0, Rm + 4 → Rm

—

LDS.L

@Rm+,Y1

0100mmmm10110110

(Rm)

→ Y1, Rm + 4 → Rm

—

NOP

0000000000001001

No operation

—

RTE

0000000000101011

Delayed branch,

stack area

→ PC/SR

4LSB

SETRC

0100mmmm00010100

RE–RS operation result

(repeat status)

→ RF1, RF0

Rm[11:0]

→ RC (SR[27:16])

1—

SETRC

#imm

10000010iiiiiiii

RE–RS operation result

(repeat status)

→ RF1, RF0

imm

→ RC (SR[23:16]),

→ SR[27:24]

SETT

0000000000011000

→ T1

SLEEP

0000000000011011

Sleep

—

STC

SR,Rn

0000nnnn00000010

→ Rn

—

STC

GBR,Rn

0000nnnn00010010

GBR

→ Rn

—

STC

VBR,Rn

0000nnnn00100010

VBR

→ Rn

—

STC

MOD,Rn

0000nnnn01010010

MOD

→ Rn

—

STC

RE,Rn

0000nnnn01110010

→ Rn

—

STC

RS,Rn

0000nnnn01100010

→ Rn

—

STC.L

SR,@–Rn

0100nnnn00000011

Rn–4

→ Rn, SR → (Rn)

—

STC.L

GBR,@–Rn

0100nnnn00010011

Rn–4

→ Rn, GBR → (Rn)

—

STC.L

VBR,@–Rn

0100nnnn00100011

Rn–4

→ Rn, VBR → (Rn)

—

STC.L

MOD,@–Rn

0100nnnn01010011

Rn–4

→ Rn, MOD → (Rn)

—

STC.L

RE,@–Rn

0100nnnn01110011

Rn–4

→ Rn, RE → (Rn)

—

STC.L

RS,@–Rn

0100nnnn01100011

Rn–4

→ Rn, RS → (Rn)

—

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