SH7616 datasheet(234/935 Pages) RENESAS

234 / 935 page

Section 6 User Break Controller (UBC)

Rev. 2.00 Mar 09, 2006 page 208 of 906

REJ09B0292-0200

6.2.5

Break Address Mask Register B (BAMRB)

BAMRBH

Bit:

BAMB31 BAMB30 BAMB29 BAMB28 BAMB27 BAMB26 BAMB25 BAMB24

Initial value:

000

R/W:

R/W

Bit:

543

210

BAMB23 BAMB22 BAMB21 BAMB20 BAMB19 BAMB18 BAMB17 BAMB16

Initial value:

000

R/W:

R/W

BAMRBL

Bit:

BAMB15 BAMB14 BAMB13 BAMB12 BAMB11 BAMB10 BAMB9 BAMB8

Initial value:

000

R/W:

R/W

Bit:

543

210

BAMB7 BAMB6 BAMB5 BAMB4 BAMB3 BAMB2 BAMB1 BAMB0

Initial value:

000

R/W:

R/W

Break address mask register B (BAMRB) consists of two 16-bit readable/writable registers: break

address mask register BH (BAMRBH) and break address mask register BL (BAMRBL).

BAMRBH specifies which bits of the break address set in BARBH are to be masked, and

BAMRBL specifies which bits of the break address set in BARBL are to be masked. BAMRBH

and BAMRBL are initialized to H'0000 by a power-on reset; after a manual reset, their values are

undefined.

BAMRBH Bits 15 to 0—Break Address Mask B31 to B16 (BAMB31 to BAMB16): These bits

specify whether or not corresponding channel B break address bits 31 to 16 (BAB31 to BAB16)

set in BARBH are to be masked.

SH7616 Datasheet(PDF) 234 Page - Renesas Technology Corp

SH7616 Datasheet(HTML) 234 Page - Renesas Technology Corp

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL