SH7616 datasheet(304/935 Pages) RENESAS

304 / 935 page

Section 7 Bus State Controller (BSC)

Rev. 2.00 Mar 09, 2006 page 278 of 906

REJ09B0292-0200

7.2.9

Refresh Timer Counter (RTCNT)

Bit:

————————

Initial value:

00000000

R/W:

RRRRRRRR

Bit:

76543210

Initial value:

00000000

R/W:

R/W

The 8-bit counter RTCNT counts up with input clocks. The clock select bit of RTCSR selects an

input clock. RTCNT values can always be read/written by the CPU. When RTCNT matches

RTCOR, RTCNT is cleared. Returns to 0 after it counts up to 255.

Bits 15 to 8—Reserved: These bits are always read as 0. The write value should always be 0.

7.2.10

Refresh Time Constant Register (RTCOR)

Bit:

————————

Initial value:

00000000

R/W:

RRRRRRRR

Bit:

76543210

Initial value:

00000000

R/W:

R/W

RTCOR is an 8-bit read/write register. The values of RTCOR and RTCNT are constantly

compared. When the values correspond, the compare match flag (CMF) in RTCSR is set and

RTCNT is cleared to 0. When the refresh bit (RFSH) in the individual memory control register

(MCR) is set to 1, a refresh request signal occurs. The refresh request signal is held until refresh

operation is actually performed. If the refresh request is not processed before the next match, the

previous request becomes ineffective.

SH7616 Datasheet(PDF) 304 Page - Renesas Technology Corp