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DP8344 Datasheet(PDF) 167 Page - National Semiconductor (TI) |
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DP8344 Datasheet(HTML) 167 Page - National Semiconductor (TI) |
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167 / 184 page ![]() 60 Reference Section (Continued) ECR ERROR CODE REGISTER Alternate R4 with SEC high read only 76 5 432 1 0 rsv rsv rsv OVF PAR IES LMBT RDIS OVF Receiver oVerFlow Set when the receiver has processed 3 words and another complete frame is received before the FIFO is read by the CPU Cleared by reading ECR or by asserting TRES PAR PARity error Set when bad (odd) overall word parity is detected in any receive frame Cleared by reading ECR or by asserting TRES IES Invalid Ending Sequence Set when the ‘‘mini-code violation’’ is not correct during a 3270 3299 or 8-bit ending sequence Cleared by read- ing ECR or by asserting TRES LMBT Loss of Mid-Bit Transition Set when the ex- pected Manchester Code mid-bit transition does not occur within the allowed window Cleared by reading ECR or by asserting TRES RDIS Receiver DISabled while active Set when transmitter is activated while receiver is active without RPEN being asserted Cleared by reading ECR or by asserting TRES Further informa- tion Section 32 Transceiver Functional Descrip- tion FBR FILL-BIT REGISTER Alternate R3 readwrite 76543210 FB7 FB6 FB5 FB4 FB3 FB2 FB1 FB0 FB7–0 Fill Bits 5250 fill-bit control Further informa- tion Section 30 Transceiver 167 |
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