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FDC37M607 Datasheet(PDF) 118 Page - SMSC Corporation

Part # FDC37M607
Description  ENHANCED SUPER I/O CONTROLLER WITH INFRARED SUPPORT
PDF  182 Pages
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Manufacturer  SMSC [SMSC Corporation]
Direct Link  http://www.smsc.com
Logo SMSC - SMSC Corporation

FDC37M607 Datasheet(HTML) 118 Page - SMSC Corporation

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118
GATEA20 AND KEYBOARD RESET
The FDC37M60x provides two options for
GateA20 and Keyboard Reset: 8042 Software
Generated GateA20 and KRESET and Port 92
Fast GateA20 and KRESET.
PORT 92 FAST GATEA20 AND KEYBOARD
RESET
Port 92 Register
This port can only be read or written if Port 92
has been enabled via bit 2 of the KRST_GA20
Register (Logical Device 7, 0xF0) set to 1.
This register is used to support the alternate
reset (nALT_RST) and alternate A20 (ALT_A20)
functions.
Name
Port 92
Location
92h
Default Value
24h
Attribute
Read/Write
Size
8 bits
Port 92 Register
Bit
Function
7:6
Reserved. Returns 00 when read.
5
Reserved. Returns a 1 when read.
4
Reserved. Returns a 0 when read.
3
Reserved. Returns a 0 when read.
2
Reserved. Returns a 1 when read.
1
ALT_A20 Signal control. Writing a 0 to this bit causes the ALT_A20 signal to be
driven low. Writing a 1 to this bit causes the ALT_A20 signal to be driven high.
0
Alternate System Reset.
This read/write bit provides an alternate system reset
function. This function provides an alternate means to reset the system CPU to
effect a mode switch from Protected Virtual Address Mode to the Real Address
Mode. This provides a faster means of reset than is provided by the Keyboard
controller. This bit is set to a 0 by a system reset. Writing a 1 to this bit will cause
the nALT_RST signal to pulse acitive (low) for a minimum of 1 µs after a delay of
500 ns.
Before another nALT_RST pulse can be generated, this bit must be
written back to a 0.
nGATEA20
8042 P21
ALT_A20
System nA20M
0
0
0
0
1
1
1
0
1
1
1
1



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