AD9213 datasheet(108/110 Pages) AD

108 / 110 page

AD9213

Data Sheet

Rev. A | Page 108 of 110

APPLICATIONS INFORMATION

The following sections contain procedures necessary to

properly operate the AD9213 within a given application.

STARTUP SEQUENCE

To start the device, take the following steps:

1. Power up the AD9213. There is no supply sequencing

requirement. The sample clock can be applied after power

is applied. The sample clock must be applied before the

write to Register 0x26 = 0x08 (see Step 5).

2. Assert a Pin Reset. Take the AD9213 RSTB pin from high

(SVDD2 voltage) to low (0 V), then back to high (SVDD2

voltage).

3. Write Register 0x0 = 0x24 to set the SPI address ascension

mode to increment.

4. Wait 100 ms before performing the next step.

5. Write Register 0x26 = 0x08 to configure the AD9213 to

receive sample clock signal. Sample clock must be applied

before this step is performed.

6. Wait 100 ms before performing the next step.

7. Perform the user specific configuration of DDC, NCO, and

JESD, which varies depending on the required application.

This example is for 16 lane, M = 2, complex decimate by 8,

N = N' = 16, with no NCO configuration.

a) Write Register 0x504, Bit 4 = 1. Set SYNC pin

logic type: 0 = CMOS, 1 = LVDS.

b) Write Register 0x520 = 0x8F. Scrambler on,

L = 16 lanes.

c) Write Register 0x521 = 0x01. Set F = 2.

d) Write Register 0x522 = 0x1F. K = 32 (default).

e) Write Register 0x523 = 0x01. M = 2 (2 virtual

converters, I/Q).

f) Write Register 0x524 = 0xCF. Set N = 16.

g) Write Register 0x525 = 0x0F. N' = 16, Subclass 0

operation.

h) Write Register 0x606 = 0x01. Complex

decimation enabled.

Write Register 0x607 = 0x03. Chip decimate by 8

Write Register 0x630 = 0x00. Bit 4 = 0. Complex

output, Bits[3:2] = 0 NCO enabled (at 0 Hz),

Bit 1 = 0 DDC 0 dB gain.

k) Write Register 0x631 = 0x02. DDC decimate by 8.

8. Write Register 0x681 = 0x10. Enables DDC and JTX

clocks.

9. Write Register 0x570, Bit 0 = 0, powers down JESD204B

PLL

10. Write Register 0x570, Bit 0 = 1. powers up JESD204B PLL

11. Read Register 0x501. Confirm if JESD204B PLL is locked,

Bit 7 = 1 indicates lock.

CHANGING SAMPLE CLOCK FREQUENCY

WITHOUT POWER DOWN

To change the sample clock frequency (encode clock rate)

without powering-down the ADC, take the following steps:

1. Write Register 0x332 = 0x02 to alert the AD9213 that the

user is changing the clock frequency.

2. Read Register 0x1614, Bit 0. Wait for this bit to go high,

which indicates that the user can change the encode clock

rate.

3. Write Register 0x1602 = 0x01. This selects the coefficient

location for Clock Rate 1.

4. Change the frequency of the clock applied to the CLK_P

and CLK_N pins.

a. Change any other necessary parameters due to the

clock frequency change. For example, JESD PLL

divider settings related to clock rate changes.

5. Write Register 0x1614, Bit 1 = 1. This notifies the AD9213

that the sample clock frequency has been changed.

6. Read Register 0x1614, Bit 2. Wait for this bit to go high

which indicates that the change is complete.

The AD9213 now functions at the new sample frequency.

The coefficients from Register 0x1602 = 0x01 are now for the

new, user selected clock frequency. At this point, coefficients are

stored for two clock frequencies: Register 0x1602 = 0x00,

coefficients for Clock Rate 0 (the original sample rate), and

sample rate).

To return to the original sample rate (Clock Rate 0), perform

the procedure outlined in this section and set the Register 0x1602

clock rate parameter to Clock Rate 0.

The AD9213 now functions at the selected sample frequency,

and the ADC is ready for operation at Clock Rate 0 within a few

microseconds.

The procedure described in this section can be performed for

four sample clock frequencies, including the original frequency

used by the AD9213 at power-up. The coefficients for different

clock frequencies are accessed by the different writes to

The following are examples of write operations to access the

coefficients for various clock frequencies:

•

Write Register 0x1602 = 0x00. This is the default value and

contains coefficients for the original sample clock

frequency (Clock Rate 0).

•

Write Register 0x1602 = 0x01. This is points to Clock

Rate 1 and contains coefficients for the user selected clock

frequency (Clock Rate 1).

•

Write Register 0x1602 = 0x02. This is points to Clock

Rate 2 and contains coefficients for the user selected clock

frequency (Clock Rate 2).

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